Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate
2006-07-18
2006-07-18
Huynh, Kim (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
C710S055000, C712S214000, C712S216000
Reexamination Certificate
active
07080170
ABSTRACT:
An apparatus comprises a buffer comprising a plurality of entries, a plurality of age vectors, and a control circuit coupled to the buffer. Each of the age vectors corresponds to one or more of the entries. Responsive to data being provided to the buffer to be written to at least a first entry, the control circuit is configured to generate a first age vector. The first age vector corresponds to the first entry, and is indicative of which of the plurality of entries contain data that is older than the data being written to the first entry. The control circuit is configured to select an entry for reading responsive to the plurality of age vectors. The selected entry has an attribute used to select the selected entry, and other entries indicated as storing older data in the age vector corresponding to the selected entry do not have the attribute.
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Ciraula Michael K.
McMinn Brian D.
Zuraski, Jr. Gerald D.
Advanced Micro Devices , Inc.
Chen Alan S
Huynh Kim
Merkel Lawrence J.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
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