Circuits, systems and methods for modifying data stored in a mem

Details Circuits, systems and methods for modifying data stored in a mem Circuits, systems and methods for modifying data stored in a mem

1997-07-30

1999-06-22

Zarabian, A.

Static information storage and retrieval

Read/write circuit

Including specified plural element logic arrangement

365196, 36518905, G11C 1604

Patent

active

059149000

ABSTRACT:
A memory system 104 includes an array 200 of memory cells arranged in rows and columns. Circuitry 208 is included for selectively performing logic operations on a bit of data stored in a selected cell using a bit of received modifying data and mode data bit for selecting a logic operation for performance. Circuitry 208 for performing logic operations is operable during an AND logic operation to write data into the cell when the bit of modifying data is a logic zero and maintaining an existing bit stored in the cell when the bit of modifying data is a logic one. Also included is circuitry 207, 210 for receiving and latching the mode data bit and the modifying data through a single port.

REFERENCES:
patent: 5195056 (1993-03-01), Pinkham
patent: 5432743 (1995-07-01), Kusakari
"Patent Abstracts of Japan" vol. 18, No. 264, p. 1740 on May 19, 1994 Abstract JP A 06 036555.
"Patent Abstracts of Japan" vol. 18, No. 333, p. 1759 on Jun. 23, 1994 Abstract No. JP A 06076565.

Affiliated with

Also associated with

Rating

Circuits, systems and methods for modifying data stored in a mem does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Circuits, systems and methods for modifying data stored in a mem, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuits, systems and methods for modifying data stored in a mem will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1712574