Electronic digital logic circuitry – Signal sensitivity or transmission integrity
Reexamination Certificate
2008-05-13
2008-05-13
Tan, Vibol (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
C326S031000, C326S082000, C327S108000, C327S180000
Reexamination Certificate
active
07372291
ABSTRACT:
A slew rate control circuit includes a receiver for receiving input signals and an output generator for generating output signals based on the input signals. The slew rate control circuit also includes an electrical interconnection coupling an output of the receiver and an input of the output generator. In addition, the slew rate control circuit includes a voltage clamp for clamping a voltage on the electrical interconnection between two known voltage reference levels. The voltage clamp may include a first current source for providing driving capacity to a driver circuit to prevent the voltage on the electrical interconnection from falling below one known voltage reference level. The voltage clamp may also include a second current source and a third current source for providing sinking capacity to the driver circuit to prevent the voltage on the electrical interconnection from rising above the other known voltage reference level.
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Jorgenson Lisa K.
Munck William A.
STMicroelectronics Asia Pacific Pte. Ltd.
Tan Vibol
White Dylan
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