Circuits and methods for electrostatic discharge protection...

Details Circuits and methods for electrostatic discharge protection... Circuits and methods for electrostatic discharge protection...

2005-07-05

2005-07-05

Eckert, George (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S355000, C257S360000, C257S362000, C257S370000

Reexamination Certificate

active

06914305

ABSTRACT:
An output circuit of an integrated circuit device includes first and second MOS transistors including respective spaced apart pairs of source and drain regions in a substrate, arranged such that respective first and second channels of the first and second MOS transistors are laterally displaced with respect to one another. The output circuit further includes an isolation region in the substrate, disposed between the first and second MOS transistors. A first conductor connects the source region of the first MOS transistor to a power supply node. A second conductor connects the drain region of the first MOS transistor to the source region of the second MOS transistor. A third conductor connects the drain region of the second MOS transistor to an external signal pad of the integrated circuit device. The isolation region may comprise first and second insulation regions surrounding respective ones of the first and second MOS transistors, and a guard ring surrounding and separating the insulation regions.

REFERENCES:
patent: 5847429 (1998-12-01), Lien et al.
patent: 5874763 (1999-02-01), Ham
patent: 6107865 (2000-08-01), Brady
patent: 6559508 (2003-05-01), Lin et al.
patent: 6570226 (2003-05-01), Groeseneken et al.
patent: 2003/0058027 (2003-03-01), Kwon et al.
patent: 2003/0213999 (2003-11-01), Lee et al.

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