Circuitry and methods for efficient FIFO memory

Static information storage and retrieval – Read/write circuit – Serial read/write

Reexamination Certificate

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C365S233100, C365S230050, C365S189040, C365S189120

Reexamination Certificate

active

07149139

ABSTRACT:
Circuitry and methods for an efficient FIFO memory are provided. This efficient FIFO memory has two smaller standard single-port memory banks instead of one large dual-port memory bank, as in typical FIFO memories. Whereas the dual-port memory based FIFO memory can read and write data at the same time, a typical single-port memory based FIFO cannot. The operation of the two single-port memory banks are coordinated in order to provide similar or better performance than a dual-port memory based FIFO.

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patent: 5663910 (1997-09-01), Ko et al.
patent: 6678201 (2004-01-01), Roohparvar et al.
patent: 2005/0091465 (2005-04-01), Andreev et al.
patent: WO 99/13397 (1999-03-01), None

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