Circuitry and method for gating information

Details Circuitry and method for gating information Circuitry and method for gating information

1995-12-18

1997-11-18

Hudspeth, David R.

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Field-effect transistor

326 31, 326 87, H03K 9003

Patent

active

056891989

ABSTRACT:
A first inverter includes a first input coupled to a first input node. Also, the first inverter includes a first output coupled to an output node. Further, the first inverter includes a voltage node. A second inverter includes a second input coupled to a second input node. Moreover, the second inverter includes a second output coupled to the voltage node.

REFERENCES:
patent: 4704548 (1987-11-01), Strong et al.
patent: 4940908 (1990-07-01), Tran
patent: 5233233 (1993-08-01), Inoue et al.
patent: 5250855 (1993-10-01), Asato
patent: 5338980 (1994-08-01), Ovens
patent: 5550487 (1996-08-01), Lyon
IBM Technical Disclosure Bulletin, vol. 19, No. 1, Jun. 1976.
IBM Technical Disclosure Bulletin, vol. 36, No. 09A, Sep. 1993, pp 87-88.

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