Circuit wiring interference analysis device, interference...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

active

07814445

ABSTRACT:
An interference analysis device that analyzes interference includes an input unit that inputs design data, a selection unit that selects an analysis region, a division unit that divides a wire into segments, a calculation unit that calculates a circuit matrix regarding a coupled line, and an analysis unit that obtains a degree of electromagnetic interference, wherein the calculation unit calculates a circuit matrix of the coupled line, using a parameter set obtained by adding an asymmetry parameter to RLGC parameters of a transmission line in the coupled line. Thus, a method for analyzing an interference of circuit wiring can be provided, which is capable of shortening a processing time substantially while maintaining high precision.

REFERENCES:
patent: 2004/0075436 (2004-04-01), Kurokawa et al.
patent: 2005/0010380 (2005-01-01), Yanagisawa et al.
patent: 0 845 746 (1998-06-01), None
patent: 10-190319 (1998-07-01), None
patent: 10-214281 (1998-08-01), None
patent: 11-296504 (1999-10-01), None
Arz et al.“Asymmetric Coupled CMOS Lines—An Experimental Study”, Dec. 2000, IEEE Transactions on Microwave Theory and Technologys, vol. 48, No. 12, pp. 2409-2414.
Zhurbenko et al.“Broadband Impedance Transformer Based on Asymmetric Coupled Transmission Lines in Nonhomogeneous Medium”, 2007, International Microwave Symposium Digest, IEEE/MTT-S, pp. 1893-1896.
Williams,“Multiconductor Transmission Line Characterization”, May 1997, NIST, one set (17 pages).
Tripathi, et al., “A Configuration-Oriented SPICE Model for Multiconductor Transmission Lines in an Inhomogeneous Medium”, IEEE Transactions on Microwave Theory and Techniques, vol. 46, No. 12, Dec. 1998, pp. 1997-2005, XP011037442, ISSN: 0018-9480.
Quéré, et al., “Interconnect Mode Conversion in High-speed VLSI Circuits”, Quality Electronic Design, 2004, Proceedings. 5thInternational Sympos IUM on San Jose, California, Mar. 22-24, 2004, Piscataway, NJ, USA, IEEE, Mar. 22, 2004, pp. 265-270, XP010695503, ISBN: 978-0-7695-2093-3.
Banwell, et al., “A Novel Approach to the Modeling of the Indoor Power Line Channel Part I: Circuit Analysis and Companion Model”, IEEE Transactions on Power Delivery, IEEE Service Center, New York NW, US, vol. 20, No. 2, Apr. 2005, pp. 655-663, XP011129366, ISSN: 0885-8977.
Gupta, et al., “Microstrip Lines and Slotlines (Artech House Antennas and Propagation Library)”, Artech House Publishers, Mar. 1, 1996, pp. 457-469.

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