Circuit trimming of packaged IC chip

Details Circuit trimming of packaged IC chip Circuit trimming of packaged IC chip

2001-11-21

2004-06-08

Zarneke, David A. (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S1540PB, C714S724000, C368S120000

Reexamination Certificate

active

06747468

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 90121109, filed Aug. 28, 2001.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates generally to circuit trimming and, more particularly, the invention relates to circuit trimming of a packaged IC chip.
2. Description of the Related Art
In integrated circuit (IC) manufactures, the final IC chip product generally does not run with exactly-expected results. These deviations are typically due to the accumulation of deviations of the numerous semiconductor processes that are performed to achieve the final IC chip product. In some cases, for example in digital circuits, the consequences of these deviations may be minor. In other cases when the input/output (I/O) signals of the IC chip product must be strictly controlled, for example in analog circuits, the consequences of these deviations may be problematic.
To compensate the deviations generated by the IC manufacture processes, circuit trimming is conventionally achieved via electrically coupling an adjuster device with the circuit of the IC chip.
Referring to
FIG. 1
, a block diagram schematically illustrates a conventional adjuster device for circuit trimming. As shown in
FIG. 1
, the output signal of an IC chip
100
conventionally pass through an adjuster device
102
before being externally delivered. The role of the adjuster device
102
is to ensure that the signal outputted by the IC chip
100
is strictly within a permitted range. To attain this purpose, the adjuster device
102
conventionally includes fuses (
108
,
110
,
112
) and resistors. Some of the fuses (
108
,
110
,
112
) may be electrically cut off to configure the adjuster device
102
in such a way that signals outputted are restricted within a desired range, thereby achieving circuit trimming of the IC chip
100
.
With the adjuster device
102
coupled with the IC chip
100
, configuring the adjuster device
102
may be typically accomplished either before or after the IC chip
100
is packaged. Before the IC chip
100
is packaged, the adjuster device
102
can be easily configured via, for example, a laser method that electrically cuts off the desired fuses. A disadvantage of this method is that it cannot compensate deviations due to IC chip packaging.
If circuit trimming is accomplished after the IC chip
100
is packaged, metal pads (
103
,
104
,
106
) and thereto-connected contact pins (not shown) must be conventionally arranged in such a manner that the contact pins externally expose through the packaging structure. Furthermore, an additional amount of circuitry is also necessary to enable the configuration of the adjuster circuit via the contact pins through the packaging structure. As a result, the space occupation of the adjuster circuit may be negatively increased, which results in an increase of the surface area of the IC chip. Because the number of contact pins is increased, accessibility problems may further arise
SUMMARY OF THE INVENTION
An aspect of the present invention is to provide a magnetically configurable adjuster device that, coupled with a packaged IC chip, can achieve circuit trimming without specific arrangements of additional contact pins and metal pads.
To accomplish the above and other objectives, the magnetically configurable adjuster device of the invention comprises a Hall element, a signal processor and amplifier device, a decoder, and a configurable adjuster. The signal processor and amplifier device connects to the output of the Hall element, the decoder connects to the output of the signal processor and amplifier device, and the configurable adjuster connects to the output of the decoder. The configurable adjuster includes a plurality of configurable elements and a plurality of circuit-trimming members, and further receives signals outputted by the packaged IC chip.
To achieve circuit trimming, a magnetic field is applied on the packaged IC chip. The magnetic field generated is directed to set a desired configuration of the configurable adjuster for achieving circuit trimming of the packaged IC chip. The Hall element senses and converts the magnetic field into a corresponding voltage signal by Hall effect. The voltage signal, after amplification through the signal processor and amplifier device, is delivered to the decoder. The decoder decodes the voltage signal into a plurality of decoded signals that are inputted to the configurable adjuster to configure the configurable elements. The configurable adjuster is thereby configured to obtain a desired circuit trimming of the packaged IC chip via the circuit-trimming members therein.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 4438347 (1984-03-01), Gehring
patent: 6396759 (2002-05-01), Lesher
patent: 6430087 (2002-08-01), Bill et al.
patent: 6462609 (2002-10-01), Hashimoto et al.

Affiliated with

Also associated with

Rating

Circuit trimming of packaged IC chip does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Circuit trimming of packaged IC chip, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit trimming of packaged IC chip will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3321709