Circuit translator

Details Circuit translator Circuit translator

1986-09-25

1989-02-07

Lall, Parshotam S.

Boots, shoes, and leggings

364488, 364300, 364900, G06F 700, G06F 1560

Patent

active

048036366

ABSTRACT:
In order to translate an original circuit consisting of a set of first devices into a target circuit which consists of a set of second devices different from the first devices, and which has the same functions as the original circuit, provision is made of memory means for storing translation rules in the first devices, translation rules in the second devices, and translation rules between the first devices and the second devices, and translation means which successively refers to these translation rules and translates the original circuit data into the target circuit data via steps that translate the original circuit data into a plurality of intermediate data.

REFERENCES:
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patent: 4613940 (1986-09-01), Shenton et al.
patent: 4703435 (1987-10-01), Darringer et al.
patent: 4725975 (1988-02-01), Sasaki
Geus et al., "A Ruled Based System for Optimizing Combinational Logic", IEE Design & Test, Aug. 1985.
Darringer et al., "Logic Synthesis Through Local Transformations", International Business Machine, 1981.
Hill et al., "Minimization of Boolean Functions", Introduction to Switch Theory and Logical Design, 1973.
Gilkinson et al., "Automated Technology Mapping", International Business Machine, 1984.
Parasch et al., "Development and Application of A Designer Oriented Cyclic Simulator", 13th DA Conference 1976.
Nakamura et al., "Logic Reorganization System" 15th DA Conference 1978.
Friedman et al., "Method Used in an Automatic Logic Design", IEE Transaction vol. C-18, No. 7, Jul. 1969.

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