Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2006-08-29
2009-10-27
Tan, Vibol (Department: 2819)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C326S022000, C327S147000
Reexamination Certificate
active
07609799
ABSTRACT:
A multiplexer circuit, system and method is provided herein for multiplexing signals with reduced jitter by eliminating all crosstalk and power supply noise injection within the multiplexer circuit. For example, crosstalk and supply noise injection may be eliminated by: (i) separating the multiplexing function into three separate logic gates and (ii) allowing only one switching input per logic gate. In some cases, jitter may be further reduced by distributing the logic gates across three distinct power domains. In other words, the logic gate inputs may be further isolated by gating each signal in its own power domain. In addition, the multiplexer circuit provides built in delay matching by utilizing three substantially identical logic gates.
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International Search Report, PCT/US2006/033947, mailed Jan. 15, 2007.
International Written Opinion of International Searching Authority, dated Nov. 26, 2008 for International Application No. PCT/US2006/033947; 6 pages.
Crawford Jason
Cypress Semiconductor Corporation
Tan Vibol
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