Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2004-12-22
2008-11-25
Whitmore, Stacy (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07458041
ABSTRACT:
Methods for optimizing design parameters of a circuit are disclosed. In one aspect, an optimization problem includes one or more performance specifications that represent an exponent of a design parameter to be optimized. Various parameters of passive and active circuit devices may be efficiently and accurately optimized as a result. In another aspect, linear performance specifications are included for accurately calculating voltages. In yet other aspects of the invention, three special types of convex optimization problems are disclosed for enabling the above use of exponents of design parameters which provide efficient and accurate calculations of a virtually unlimited array of circuit parameters and performance characteristics.
REFERENCES:
patent: 4827428 (1989-05-01), Dunlop et al.
patent: 5404319 (1995-04-01), Smith et al.
patent: 6269277 (2001-07-01), Hershenson et al.
patent: 6311145 (2001-10-01), Hershenson et al.
patent: 6425111 (2002-07-01), Hershenson et al.
patent: 6671663 (2003-12-01), Hellums et al.
patent: 6909330 (2005-06-01), Colleran et al.
patent: 6954921 (2005-10-01), Hassibi et al.
patent: 2002/0117736 (2002-08-01), Yamazaki et al.
patent: 2002/0184603 (2002-12-01), Hassibi et al.
patent: 2003/0202669 (2003-10-01), Boor
patent: 2005/0146971 (2005-07-01), Hidaka
Boyd, S. et al. Circuit Design Via Geometric Programming, ICCAD Tutorial (presented at annual International Conference on Computer Aided Design meeting), Nov. 11, 2004 (107 pages).
Boyd, S.P. et al. A Tutorial on Geometric Programming, Sep. 12, 2004 (62 pages).
Daems, W. Simulation-Based Generation of Posynomial Performance Models for the Sizing of Analog Integrated Circuits, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, May 2003, vol. 22, No. 5, pp. 517-534.
Kim, J. et al. Techniques for Improving the Accuracy of Geometric-Programming Based Analog Circuit Design Optimization, in Proceedings of International Conference on Computer Aided Design, Nov. 2004, pp. 863-870.
Li, X. et al. Robust Analog/RF Circuit Design with Projection-Based Posynomial Modeling, in Proceedings of International Conference on Computer Aided Design, Nov. 2004, pp. 855-862.
Mandal, P. et al. CMOS Op-Amp Sizing Using a Geometric Programming Formulation, in IEEE Transactions on Computer-Aided Design, Jan. 2001, vol. 20, pp. 22-38.
Vanderhaegen, J.P. et al. Automated Design of Operational Transconductance Amplifiers Using Reversed Geometric Programming, in Proceedings of the 41st Annual Design Automation Conference, Jun. 7-11, 2004 (6 pages).
Stephen P. Boyd, et al., “A Tutorial On Geometric Programming”, Department of Electrical Engineering, Stanford University, Sep. 12, 2004, pp. 1-62, Stanford, CA.
International Search Report and the Written Opinion dated Jan. 7, 2008, pp. 14.
Colleran David M.
Hershenson Mar
Blakely , Sokoloff, Taylor & Zafman LLP
Magma Design Automation Inc.
Whitmore Stacy
LandOfFree
Circuit optimization with posynomial function F having an... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Circuit optimization with posynomial function F having an..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit optimization with posynomial function F having an... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4047714