Semiconductor device manufacturing: process – With measuring or testing – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2007-11-20
2007-11-20
Deo, Duy-Vu N (Department: 1765)
Semiconductor device manufacturing: process
With measuring or testing
Packaging or treatment of packaged semiconductor
C438S022000, C438S025000, C438S050000, C438S051000, C438S052000, C438S455000, C438S456000
Reexamination Certificate
active
11166005
ABSTRACT:
A circuit-on-foil process for manufacturing a laminated semiconductor package substrate having embedded conductive patterns provides a high-density mounting and interconnect structure for semiconductor packages that is manufacturable in volume. A dielectric film is laminated on one or both sides with a foil layer with a circuit pattern disposed on a surface of the foil. The circuit-on-foil layer can be made by laser-ablating a plating resist material and then plating metal atop a foil, or by laser-exposing a photo-sensitive plating resist material and then plating the circuit pattern atop the foil. After lamination, the metal foil is removed by etching or machining to leave only the dielectric and embedded conductors. Vias can be formed between layers of embedded conductors by laser-drilling holes either though the entire substrate or from one side through to at least the bottom of one of the embedded circuit layers, and then filling the hole with metal.
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Huemoeller Ronald Patrick
Rusli Sukianto
Amkor Technology Inc.
Deo Duy-Vu N
Gunnison McKay & Hodgson, L.L.P.
Hodgson Serge J.
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