Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2000-11-21
2002-08-27
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S086000, C327S315000
Reexamination Certificate
active
06441639
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to technique of transmitting a signal between elements such as a CPU and a memory device or memory IC (for example, between digital circuits each composed of CMOS elements or functional blocks of CMOS elements), and, more particularly to techniques of quickly transmitting a signal through one bus in which one main transmission line has plural elements connected thereto.
As a technique of quickly transmitting a signal between digital circuits each composed of a semiconductor integrated circuit, there has been proposed a technique of a low-amplitude interface for propagating a signal having a signal amplitude as low as about 1 volt.
As a representative example of such a low-amplitude interface, a GTL (Gunning Transceiver Logic) interface or a CTT (Center Tapped Termination) interface has been heretofore proposed. These low-amplitude interfaces are discussed in detail in pp 269 to 290 Nikkei Electronics, Nov. 27, 1993.
FIG. 1
shows a prior art arrangement of such a low-amplitude interface in which one main transmission line has plural branched lines.
A numeral
100
denotes a transmission line terminated by termination power supplies
60
and
61
and termination resistors
50
and
51
. The transmission line
100
is connected to a driving circuit block
1
and receiving circuit blocks
2
,
3
and
4
.
The transmission line
100
has an impedance of 50 &OHgr;. Each of branched lines
11
to
14
has an impedance of 50 &OHgr;. Each of the terminating resistors
50
and
51
has an impedance of 50 &OHgr;. Each voltage of the terminating power supplies
60
and
61
is 0.5 volt. The sending or driving circuit
21
has an on resistance of 10&OHgr;.
When the driving circuit
21
is at a logical “High” output, the circuit
21
operates to connect the transmission line
11
to a 1-volt power supply (not shown). When the driving circuit
21
is at a logical “Low” output, the circuit
21
operates to connect the transmission line
11
to the ground, that is, a 0-volt power supply (not shown). Numerals
32
to
34
denote receiving circuits included in a receiving circuit block, respectively. These receiving circuits compare received signals with the reference voltage V
ref
to determine if the received signal is a Low or High level. In this arrangement, V
ref
is set at 0.5V.
Next, a description will be given as to how a signal is transmitted to each point in
FIG. 1
on this bus when the driving circuit
21
is switched from the Low output to the High output. At first, a potential of the transmission bus
100
is derived when the driving circuit
21
is at the Low output. The voltage at the point A on the transmission line at this time corresponds to a voltage given by dividing the terminating power source of 0.5 volt by the terminating resistances
50
and
51
and the on resistance of the sending circuit
21
. That is, the voltage is derived by:
0.5
V
×10&OHgr;/(10&OHgr;+50&OHgr;/ 2)=0.14(
V
)
Next, the potential will be derived of the transmission line which occurs when the output of the sending circuit
21
is switched from the Low output to the High output so that a signal is transmitted to a point A of
FIG. 1
as follows. Immediately after the output of the sending circuit
21
is switched, the power supply voltage is divided by the on-resistance of the sending circuit and the impedance 50 &OHgr; of the transmission line
11
. Hence, the potential boost at the point A is derived by:
1
V
+50&OHgr;/(50&OHgr;+10&OHgr;)=0.83 (
V
)
The addition of the initial voltage 0.14 V and the voltage boost, that is, 0.97 V corresponds to the potential at the point A.
The potential occurring when the waveform of the amplitude of 0.83 V reaches the branch point B is derived as follows. If the transmission line
100
is viewed from the transmission line
11
, since the transmission line
100
is divided into two, left and right parts, the virtual impedance of the transmission line
100
if viewed from the transmission line
11
becomes a half of an impedance 50 &OHgr; of the transmission line
100
, that is, 25 &OHgr;. On the other hand, since the impedance of the transmission line
11
is 50 &OHgr;, the mismatch of the impedance results in bringing about the reflection of a signal at the point B.
The reflective coefficient is derived as follows.
(50&OHgr;−25&OHgr;)/(50&OHgr;+25&OHgr;)=0.33
This means that a one-third part of the signal amplitude of 0.83 V transmitted to the point A, that is, a signal of the amplitude 0.28 V is reflected and returned to the sending circuit side. The signal of the left amplitude 0.55 V is transmitted to the transmission line
100
as a first transmitted wave. Hence, the potential of the transmitted signal corresponds to an addition of 0.55 V and the initial potential, that is, 0.69 V.
When the signal having the amplitude of 0.28 V returned to the sending circuit reaches the sending circuit, the signal is mirror-reflected and reaches the point B again. A two-third part of the signal passes through the transmission line
100
, while the remaining one-third part of the signal is returned to the transmission line
11
. According to such an action, the signal travels to and fro on the transmission line
11
again and again. Each time the signal waveform reaches the point B, the two-third part of each waveform is output to the transmission line
100
. By this operation, the amplitude of 0.83 V originally at the point A is dividedly transmitted to the transmission line
100
bit by bit.
The signal of 0.69 V which passed through the point B and transmitted to the transmission line
100
reaches the point C. At this point, two transmission lines are each made to have an impedance of 50 &OHgr; before the passage of the signal. Hence, the mismatch of the forward synthesized impedance 25 &OHgr; to the impedance of 50 &OHgr; of the transmission line on which the signal has passed results in bringing about the reflection of the signal.
The reflective coefficient is as follows:
(50&OHgr;−25&OHgr;)/(50&OHgr;+25&OHgr;)=0.33
The potential of the waveform passed through the point C corresponds to a potential derived by multiplying the signal amplitude of 0.55 V at the point B by a transmittance {fraction (2/3+L )} (=1−{fraction (1/3+L )}) and adding the initial potential to the multiplied value. That is,
0.55
V
×{fraction (2/3+L )}+0.14
V
=0.50(
V
)
A similar reflection takes place at the point E or the point G. The potential at the point E is 0.38 V and the potential at the point G is 0.30 V.
These results are shown in
FIGS. 2A
to
2
C.
FIG. 2A
shows signals which come to and go out of the point C, that is, a signal of the point B coming to the point C and signals of the point D and the point E going out of the point C. For explaining them clearly, the signal at the point A is shown as well. Likewise,
FIG. 2B
shows signals which come to and go out of the point E.
FIG. 2C
shows signals which come to and go out of the point G. In
FIGS. 2A
to
2
C, a numeral
201
denotes a signal waveform at the point A in
FIG. 1. A
numeral
202
denotes a waveform at the point B. A numeral
203
denotes a waveform at the point C. A numeral
204
denotes a waveform at the point D. A numeral
205
denotes a waveform at the point E. A numeral
206
denotes a waveform at the point F. A numeral
207
denotes a waveform at the point G. A numeral
208
denotes a waveform at the point H. When the signal drops, the same thing takes place. The signal waveforms at the drop of the signal are as shown in
FIGS. 3A
to
3
C. In
FIG. 3
, numerals
201
to
208
denote signal waveforms at the point A to the point H shown in
FIG. 1
, respectively.
From the situation described above, it is understood that the use of the conventional signal transmitting circuit makes it impossible to allow the first signal at the point A indicating a High level from the driving circuit
21
to exceed the reference voltage Vref (0.5 V in the above condition)
Kurihara Ryoichi
Takekuma Toshitsugu
Yamagiwa Akira
Antonelli Terry Stout & Kraus LLP
Cho James H
Hitachi Ltd
Tokar Michael
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