Circuit having anti-charge share characteristics and method ther

Details Circuit having anti-charge share characteristics and method ther Circuit having anti-charge share characteristics and method ther

1997-07-21

2000-08-29

Santamauro, Jon

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

Field-effect transistor

326 28, 326121, H03K 19096

Patent

active

061114340

ABSTRACT:
An anti-charge share device and method for operation ensure that charge share protection is provided for nodes in a logic circuit during an evaluate stage with low costs in terms of power and circuit performance. The anti-charge sharing device includes a transistor coupled between pre-charge node and a second node being evaluated. By coupling the charge share device between the pre-charge node and the node to be evaluated, operation of the charge share device is dependent upon a node which no longer requires a charge-sharing protection.

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J.A. Pretorius et al., "Latched Domino CMOS Logic", Electronics Letters, Mar. 28, 1985, vol. 21, No. 7, pp. 263-264.

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