Circuit for setting width of input/output data in semiconductor

Details Circuit for setting width of input/output data in semiconductor Circuit for setting width of input/output data in semiconductor

1999-12-30

2000-10-31

Le, Vu A.

Static information storage and retrieval

Read/write circuit

Testing

3652257, 36518905, G11C 700

Patent

active

061412732

ABSTRACT:
A circuit conveniently sets the width of input/output data in a semiconductor memory device. The circuit includes a test mode signal generator for generating a test mode signal which sets a WCBR mode to a special test mode; a program signal generator for generating a program signal according to the test mode signal output from the test mode signal generator and a signal transmitted through a predetermined address line; a pair of anti-fuse programmers, each having an anti-fuse for outputting a programmed output value indicative of a program status of an anti-fuse programmed according to the program signal; and a decoder for decoding the signal output from the anti-fuse programmers to change the input/output data width of the semiconductor memory device. The anti-fuses are used for resetting the input/output data width at the package level of a manufactured memory device. The decoder generates a first signal for setting an input/output data width at eight bits, if a signal input through the predetermined address line is toggled once, and generates a second signal for setting the input/output data width at four bits, if the signal input through the predetermined address line is toggled once more.

REFERENCES:
patent: 5657293 (1997-08-01), Merritt et al.
patent: 5751629 (1998-05-01), Nova et al.
patent: 5761145 (1998-06-01), Zagar et al.
patent: 5781483 (1998-07-01), Shore
patent: 5838625 (1998-11-01), Cutter et al.
patent: 5848010 (1998-12-01), Sher
patent: 5877987 (1999-03-01), Merritt
patent: 5892716 (1999-04-01), Ingalls

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