Circuit for reading bipolar storage cells

Static information storage and retrieval – Read/write circuit – For complementary information

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365155, 365156, 365207, G11C 1140

Patent

active

046412832

ABSTRACT:
A circuit for reading bipolar storage cells includes a storage element formed of two fed-back inverters, each of the inverters being formed of a multi-emitter transistor and a load element connected to a respective one of the multi-emitter transistors, two complementary bit-lines each being connected to one emitter of a respective one of the multi-emitter transistors, a first potential source, two bit-line current sources each being connected between the first potential source and a respective one of the complimentary bit-lines, a differential amplifier having two inputs, two read transistors each having a collector-emitter path connected between a respective one of the inputs of the differential amplifier and a respective one of the complimentary bit-lines, a second potential source, a read-current source connected to the second potential source, and two diode paths each connected between the read-current source and a respective one of the complimentary bit-lines.

REFERENCES:
patent: 4204276 (1980-05-01), Glock et al.
patent: 4348747 (1982-09-01), Takahasi
patent: 4409674 (1983-10-01), Takahashi
patent: 4456979 (1984-06-01), Isogai
patent: 4459686 (1984-07-01), Toyoda
Kawarada et al., "A Fast 7.5ng Access 1K-Bit RAM for Cache-Memory Systems," Oct. 78, vol. SC-13, No. 5, pp. 656-663.

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