Circuit for pulling an integrated circuit input to a determined

Details Circuit for pulling an integrated circuit input to a determined Circuit for pulling an integrated circuit input to a determined

1993-08-12

1995-05-30

Hudspeth, David R.

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

327331, 327321, H03K 1716, H03K 508

Patent

active

054205263

ABSTRACT:
A circuit pulls up an integrated circuit input capable of receiving a low voltage, receiving a high voltage, or floating. The circuit includes a first MOS transistor connected between the input and the high voltage; a serial connection between the high and low voltages of a second, third, and fourth MOS transistor; a connection between the gates of the first and second transistors and the junction of the third and fourth transistors; and a connection between the input and the gates of the third and fourth transistors.

REFERENCES:
patent: T952012 (1976-11-01), Lee
patent: 3774053 (1973-11-01), Carlson
patent: 3819952 (1974-06-01), Enomoto et al.
patent: 3946251 (1976-03-01), Kawagoe
patent: 4498021 (1985-02-01), Uya
patent: 4596936 (1986-06-01), Aoyama
patent: 4647797 (1987-03-01), Sanwo et al.
patent: 4958093 (1990-09-01), Kosson et al.
patent: 5095229 (1992-03-01), Yun et al.
patent: 5168181 (1992-12-01), Baiocchi et al.
patent: 5216292 (1993-06-01), Imazu et al.
patent: 5218242 (1993-06-01), Imazu et al.

Affiliated with

Also associated with

Rating

Circuit for pulling an integrated circuit input to a determined does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Circuit for pulling an integrated circuit input to a determined , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit for pulling an integrated circuit input to a determined will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-365000