Circuit for providing synchronous refresh cycles in self-refresh

Static information storage and retrieval – Read/write circuit – Data refresh

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

365233, G11C 700

Patent

active

052087794

ABSTRACT:
The invention is a circuit for synchronizing the refresh cycles of a bank of self-refreshing interruptable DRAMs. The refresh cycles are synchronized through a bidirectional control path from each self-refreshing interruptable DRAM to its respective external refresh pin.

REFERENCES:
patent: 3859640 (1975-01-01), Eberlein
patent: 4172282 (1979-10-01), Aichelmann
patent: 4238842 (1980-12-01), Aichelmann
patent: 4406013 (1983-09-01), Reese
patent: 4468759 (1984-08-01), Kung
patent: 4706221 (1987-11-01), Satoh
patent: 4792891 (1988-12-01), Baba
patent: 4881205 (1989-11-01), Aihara
patent: 4961167 (1990-10-01), Kumanoya

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Circuit for providing synchronous refresh cycles in self-refresh does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Circuit for providing synchronous refresh cycles in self-refresh, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit for providing synchronous refresh cycles in self-refresh will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1979901

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.