Circuit for merging and aligning prepend data and payload data

Details Circuit for merging and aligning prepend data and payload data Circuit for merging and aligning prepend data and payload data

2002-11-19

2004-08-03

Perveen, Rehana (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Peripheral adapting

C710S054000, C710S074000, C711S100000, C709S246000

Reexamination Certificate

active

06772247

ABSTRACT:

FIELD OF THE INVENTION
The present invention pertains to the field of integrated circuit design. More particularly, the present invention relates to a circuit that merges and aligns data.
BACKGROUND OF THE INVENTION
An integrated circuit (IC) is a device consisting of a number of connected circuit elements, such as transistors and resistors, fabricated on a single chip of silicon crystal or other semiconductor material. An IC may be processed to have a specified electrical characteristic. In a computer system, IC's typically form components such as a processor, a memory, and an input/output (I/O).
Components of a computer system communicate information to each other through data packets. Data packets may comprise a prepend portion and a payload portion. The prepend portion is also often known as a header. The prepend portion provides information regarding the payload portion that allows for the functional blocks to process the payload portion.
The prepend portion and the payload portion may each have a variable length. In addition, the starting memory location of the prepend portion, as well as the payload portion, may vary with each transmission. The components of a computer system may not be compatible with one another if the components have different data formats. For example, a memory that stores and transmits data in eight byte blocks may not be compatible with an I/O that receives and processes data in four byte blocks. Moreover, the I/O device which receives and processes the data may expect the data packet to begin at byte zero and may not be able to deal with gaps between the prepend portion and the payload portion.


REFERENCES:
patent: 4580214 (1986-04-01), Kubo et al.
patent: 5594927 (1997-01-01), Lee et al.
patent: 5892761 (1999-04-01), Stracke, Jr.
patent: 6223344 (2001-04-01), Gerard et al.
patent: 6625605 (2003-09-01), Terakura et al.

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