Circuit for measuring signal delays of asynchronous register inp

Oscillators – Ring oscillators

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

324617, 324633, 327265, 365201, 368118, 368120, 371 214, G01R 2728, G04F 1002, H03B 502, H03H 1126

Patent

active

061442623

ABSTRACT:
A circuit measures a signal propagation delay through a series of memory elements on a programmable logic device. In one embodiment, a number of latches are configured in series. Each latch is initialized to store a logic zero. The first latch is then clock-enabled so that the output of the latch rises to a logic one. The logic one from the first latch clock-enables the second latch in the series so that the output of the second latch rises to a logic one, which in turn enables the next latch in the series. The time required for a rising edge to traverse the entire sequence of latches is the cumulative time required for the output of each latch to change in response to a clock-enable signal. Consequently, the delay through the series of latches provides a measure of the time required for one of the latches to respond to a clock-enable signal. In another embodiment, the latches are arranged in a loop so that the sequence of latches forms a ring oscillator, the period of which provides an indication of the time required for the latches to respond to clock-enable signals. Other embodiments include sequences of flip-flops arranged as delay elements or ring oscillators. Those embodiments provide means for measuring the time required for flip-flops to respond to preset or clear signals.

REFERENCES:
patent: Re34363 (1993-08-01), Freeman
patent: 3603746 (1971-09-01), Heick et al.
patent: 4510429 (1985-04-01), Squire
patent: 4792932 (1988-12-01), Bowhers et al.
patent: 4795964 (1989-01-01), Mahant-Shetti et al.
patent: 4878209 (1989-10-01), Bassett et al.
patent: 4890270 (1989-12-01), Griffith
patent: 5048064 (1991-09-01), Rutherford
patent: 5083299 (1992-01-01), Schwanke et al.
patent: 5181191 (1993-01-01), Farwell
patent: 5294559 (1994-03-01), Malhi
patent: 5351211 (1994-09-01), Higeta et al.
patent: 5581738 (1996-12-01), Dombrowski
patent: 5606567 (1997-02-01), Agrawal et al.
patent: 5625288 (1997-04-01), Snyder et al.
patent: 5845233 (1998-12-01), Fishburn
patent: 5923676 (1999-07-01), Sunter et al.
patent: 5973976 (1999-10-01), Sato
"The Programmable Logic Data Book", 1998, available from Xilinx, Inc., 2100 Logic Drive, San Jose, California 95124, pp. 4-5 to 4-40.
Application Note from Xilinx, Inc., "Efficient Shift Registers, LFSR Counters, and Long Pseudo-Random Sequence Generators," by Peter Alfke, Jul. 7, 1996.
"Signal Delay in RC Tree Networks," IEEE Transactions on Computer-Aided Design, vol. CAD-2, No. 3, Jul. 1983, pp. 202-211.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Circuit for measuring signal delays of asynchronous register inp does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Circuit for measuring signal delays of asynchronous register inp, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit for measuring signal delays of asynchronous register inp will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1645428

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.