Circuit for interfacing a first type of logic circuit with a sec

Electronic digital logic circuitry – Interface – Logic level shifting

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Details

326 83, 326116, 326121, H03K 190175, H03K 19094, H03K 1920

Patent

active

061114308

ABSTRACT:
A circuit for interfacing CMOS logic devices, having an output level range associated therewith, with MESFET logic devices, having an input level range associated therewith, comprises a depletion mode MESFET device, coupled between at least one CMOS device and at least one other MESFET device, the depletion mode MESFET device limiting a current through a gate-source junction thereof such that the output level range of the at least one CMOS device is altered to be compatible with the input level range of the at least one other MESFET device. Another circuit for interfacing CMOS logic devices, having an output level range associated therewith, with MESFET logic devices, having an input level range associated therewith, comprises: a source follower MESFET device coupled to an output terminal of at least one CMOS device; a first depletion mode MESFET device, coupled to the source follower MESFET device, the first depletion mode MESFET device limiting a current through a gate-source juction thereof such that the output level range of the at least one CMOS device is altered to be compatible with the input level range of at least one other MESFET device; and a second depletion mode MESFET device, coupled to the first depletion mode MESFET device, for providing a discharge path; wherein an input terminal of the at least one other MESFET device is coupled between the first and second depletion mode MESFET devices.

REFERENCES:
patent: 4810907 (1989-03-01), Tohyama
patent: 4812683 (1989-03-01), Fitzpatrick et al.
patent: 4853561 (1989-08-01), Gravrok
patent: 5045727 (1991-09-01), Danckaert et al.
patent: 5286985 (1994-02-01), Taddiken
patent: 5420527 (1995-05-01), Naber
patent: 5705940 (1998-01-01), Newman et al.

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