Circuit for generating wait signal in semiconductor device

Details Circuit for generating wait signal in semiconductor device Circuit for generating wait signal in semiconductor device

2007-08-14

2007-08-14

Lee, Thomas (Department: 2115)

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

C713S501000, C713S502000

Reexamination Certificate

active

10879446

ABSTRACT:
The present invention discloses a circuit for generating a wait signal in a semiconductor device. Even if an address input enable signal is synchronized with a clock and continuously or irregularly inputted, the circuit for generating the wait signal in the semiconductor device generates the wait signal suitable for a latency counter by using the finally-inputted address input enable signal. In addition, the circuit for generating the wait signal in the semiconductor device generates the wait signals having various pulse widths to be suitable for various latency counters, and enables the object wait signal earlier than data input or output by one clock, or simultaneously with data input or output.

REFERENCES:
patent: 5572706 (1996-11-01), Matsumoto
patent: 6549477 (2003-04-01), Bautista et al.
patent: 6611796 (2003-08-01), Natarajan et al.
patent: 6857035 (2005-02-01), Pritchard et al.
patent: 6915406 (2005-07-01), Chiba et al.
patent: 2002/0035654 (2002-03-01), Mori et al.

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