Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate
2006-06-27
2006-06-27
Le, Thong Q. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Signals
Reexamination Certificate
active
07068549
ABSTRACT:
Provided is directed to a circuit for generating a DQS signal in a semiconductor memory device which includes: a DQS data generation unit for generating a DQS preamble signal and a DQS data, signals earlier than a CAS latency; a DQS output control signal generation unit for generating a control signal to drive the DQS preamble signal out before the CAS latency and to drive the DQS data out after the CAS latency; a DQS driver for driving the DQS preamble signal and a rising data of the DQS data from the DQS data generation unit according to a rising clock of the DQS output control signal generation unit, and driving a falling data from the DQS data generation unit according to a falling clock of the DQS output control signal generation unit.
REFERENCES:
patent: 6680866 (2004-01-01), Kajimoto
patent: 6768698 (2004-07-01), Kono
Hynix / Semiconductor Inc.
Le Thong Q.
Marshall & Gerstein & Borun LLP
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