Circuit for generating data strobe signal in DDR memory...

Details Circuit for generating data strobe signal in DDR memory... Circuit for generating data strobe signal in DDR memory...

2011-07-19

2011-07-19

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Read/write circuit

Signals

C365S191000, C365S233130, C365S194000, C365S233100, C365S233110, C365S233120, C365S230060

Reexamination Certificate

active

07983101

ABSTRACT:
The present invention discloses a circuit for generating a data strobe signal in a DDR memory device and a method therefor which can precisely distinguish preamble and postamble periods of the data strobe signal by generating pulses for generating the data strobe signal only in a data strobe signal input period by using an internal clock signal according to CAS latency under a read command, and generating the data strobe signal by using the pulses, and which can improve reliability of the circuit operation by precisely controlling operation timing with the internal clock signal.

REFERENCES:
patent: 6215710 (2001-04-01), Han et al.
patent: 6687169 (2004-02-01), Ryu et al.
patent: 6940321 (2005-09-01), Heo et al.
patent: 6977848 (2005-12-01), Choi
patent: 6982924 (2006-01-01), Na
patent: 7064989 (2006-06-01), Na et al.
patent: 7173866 (2007-02-01), Na et al.

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