Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2006-04-18
2006-04-18
Bataille, Pierre (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S104000, C711S105000, C365S203000, C365S230060
Reexamination Certificate
active
07032084
ABSTRACT:
A circuit for generating a Yi control signal in a memory device. The circuit comprises a column select signal control block for generating a Yi control signal for a normal operation of a first cycle of a page mode, a latch for setting the Yi control signal from the column select signal control block, a read reset block for resetting the latch, a page read Yi enable block for generating the Yi control signal when a page address is changed in a page read mode and then setting the latch, and a page read reset block for resetting the latch set by the page read Yi enable block.
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Bataille Pierre
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
Tsai Sheng-Jen
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