Circuit for generating clock signal and decoding data signal...

Registers – Records – Conductive

Reexamination Certificate

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C235S441000, C235S451000

Reexamination Certificate

active

06908037

ABSTRACT:
An integrated circuit card includes a circuit for generating a clock signal and restoring data. The circuit includes a receiver for receiving a radio frequency signal having a pause period; a divider for dividing the received signal; a first counter for counting a period of the divided signal at each non-pause period of the received signal; a second counter for counting a period of the divided signal; and a decoder for generating a synchronous clock signal and a decoded data signal in response to outputs of the first and second counters. The circuit can generate a synchronous clock signal and decode a received data signal so as to be compatible with ISO/IEC 14443 Type A protocol, based on the received radio frequency signal transferred from a card reader. The circuit provides an exact decoding result even when the pause period of the received radio frequency varies over a predetermined range.

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International Standards Organization, ISO/IEC JTC 1/SC 17, “Identification cards-Contactless integrated circuit card(s)—Proximity cards-Part 1: Physical characteristics,” Oct. 20, 1999, pp. 1-5.
International Standards Organization, ISO/IEC JTC 1/SC 17, “Identification cards-Contactless integrated circuit card(s)—Proximity cards-Part 2: Radio frequency power and signal interface,” Jul. 13, 2000, pp. 1-11.
International Standards Organization, ISO/IEC JTC 1/SC 17, “Identification cards-Contactless integrated circuit cards(s)—Proximity cards-Part 3: Initialization and anticollision,” Jul. 13, 2000, pp. 1-48.

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