Circuit for fast fourier transform operation

Details Circuit for fast fourier transform operation Circuit for fast fourier transform operation

2011-07-12

2011-07-12

Malzahn, David H (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

Reexamination Certificate

active

07979485

ABSTRACT:
A circuit for a fast Fourier transform (FFT) operation is provided. The FFT operation circuit includes a plurality of butterfly operation units connected in series. Each of the plurality of butterfly operation units reads a signal in the order in which the plurality of butterfly operation units perform complex multiplication, addition, and subtraction, performs complex multiplication of each sequentially read signal by a complex coefficient corresponding to an FFT length and the stage number of the butterfly operation unit, and performs complex addition and subtraction with the complex multiplied signal. In this way, without disposing a plurality of operation circuits corresponding to a radix, FFT operations corresponding to a plurality of FFT lengths can be performed.

REFERENCES:
patent: 7428564 (2008-09-01), Gibb et al.
patent: 7693034 (2010-04-01), Singh et al.
patent: 2002/0178195 (2002-11-01), Ryu
patent: 2004/0039765 (2004-02-01), Nakazuru et al.
patent: 2005/0114421 (2005-05-01), Gibb et al.
patent: 2008/0071848 (2008-03-01), Baireddy et al.
patent: 6-19955 (1994-01-01), None
patent: 2002-132747 (2002-05-01), None
Japanese Office Action issued on Mar. 1, 2011 in the corresponding Japanese Patent Application No. 2005-366731.

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