Circuit for equalizing bit lines in a ROM

Details Circuit for equalizing bit lines in a ROM Circuit for equalizing bit lines in a ROM

1984-09-04

1986-06-10

Moffitt, James W.

Static information storage and retrieval

Systems using particular element

Semiconductive

365189, 365203, G11C 1140

Patent

active

045946892

ABSTRACT:
A non-volatile memory has a plurality of coupling transistors for coupling bit lines to an equalization line in response to an equalization pulse. The equalization line has capacitance as do the bit lines. Prior to the occurrence of the equalization pulse, the unselected bit lines are charged to a first predetermined voltage, and the equalization line is charged to a second predetermined voltage by a high impedance reference voltage generator. A pulse generator provides the equalization pulse in response to an address transition.

REFERENCES:
patent: 4404659 (1983-09-01), Kihara et al.
patent: 4460981 (1984-07-01), Van Buskirk et al.

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