Circuit for driving switching element

Details Circuit for driving switching element Circuit for driving switching element

1999-03-24

2001-05-08

Tokar, Michael (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C084S089000, C084S088000

Reexamination Certificate

active

06229339

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a circuit for driving a switching element, and more specifically to a circuit for driving a set of interconnected switching elements.
2. Description of the Related Art
Conventionally, there has been a circuit for driving a set of interconnected switching elements alternately, and providing an electric current for a load connected to the connection point between the elements. This type of circuit is used as a power supply circuit for a DC/DC converter, inverter, etc., or an H bridge circuit for driving a motor, etc.
FIG. 1
shows an example of the configuration of a set of interconnected switching elements and the driving circuit thereof. In this example, the conventional driving circuit is applied to a DC/DC converter.
A MOS transistor
1
and a MOS transistor
2
are interconnected in series. An input voltage Vin is applied to the MOS transistor
1
, and the MOS transistor
2
is grounded. An inductor and, through the inductor, an output capacitor are connected to the connection point (point Lx) between the MOS transistor
1
and the MOS transistor
2
.
The drive circuit of the MOS transistor
1
includes transistors Q
1
through Q
4
and transistors M
1
through M
4
. The drive circuit of the MOS transistor
2
includes transistors Q
5
through Q
8
and transistors M
5
through M
8
. These two driving circuits have the same configurations. The transistors Q
1
, Q
2
, M
3
, and M
4
are circuits for turning on the MOS transistor
1
and holding an ON state thereof. The transistors Q
3
, Q
4
, M
1
, and M
2
are circuits for turning off the MOS transistor
1
and holding an OFF state thereof. These also hold true with the MOS transistor
2
.
Switching signals S and S are signals for controlling the MOS transistor
1
and the MOS transistor
2
respectively, and are basically in inverse states to each other. Therefore, according to these signals the MOS transistor
1
and the MOS transistor
2
are alternately set in the ON state.
Briefly described below is the operation of the circuit for driving the MOS transistor
1
. When an ‘H’ is input as a switching signal S, the transistor Q
1
is set in the OFF state, and the transistor Ml enters the ON state, thereby setting the transistor Q
2
in the OFF state. Therefore, no current is applied to the gate of the MOS transistor
1
. When an ‘H’ is input as a switching signal S, the transistors M
2
and M
3
enter the ON state and the OFF state respectively. As a result, the transistor Q
3
is set in the ON state and the transistor M
4
enters the OFF state, thereby setting the transistor Q
4
in the ON state. Therefore, an electric charge is removed from the gate of the MOS transistor
1
by an electric current flowing through the transistor Q
4
. As a result, the MOS transistor
1
maintains its OFF state.
On the other hand, when an ‘L’ is input as a switching signal S, the transistors Q
1
and Q
2
are set in the ON state, thereby applying an electric current to the gate of the MOS transistor
1
, and simultaneously setting the transistors Q
3
and Q
4
in the OFF state. As a result, the MOS transistor
1
is set in the ON state.
The operation of the circuit for driving the MOS transistor
2
is the same as the operation of the circuit for driving the MOS transistor
1
. Therefore, when inverse states are inputs as switching signals S and S, the MOS transistor
1
and the MOS transistor
2
are alternately driven in the ON state.
As described above, the MOS transistor
1
and the MOS transistor
2
are basically turned on alternately. If these two transistors are simultaneously set in the ON state, then the power supply (input voltage Vin) and the ground are substantially short-circuited. When such a short-circuit occurs, the MOS transistor
1
and the MOS transistor
2
can be destroyed by an overcurrent. Therefore, a dead time is provided to avoid such a short-circuit so that the MOS transistor
1
and the MOS transistor
2
cannot simultaneously enter the ON state. For example, immediately before the MOS transistor
1
is turned on, the MOS transistor
2
is turned off.
When the MOS transistor
1
is turned on with the configuration including the dead-time, the electric potential at a point Lx suddenly rises because the MOS transistor
2
has already been turned off. As well-known by one of ordinary skill in the art, a parasitic capacitance exists between the drain and the gate of MOS transistor. Therefore, if the electric potential at the point Lx suddenly rises when the MOS transistor
1
is turned on, then the parasitic capacitance makes the potential rise also at the gate of the MOS transistor
2
. At this time, if the potential between the gate and the source of the MOS transistor
2
exceeds a threshold voltage, then the MOS transistor
2
is turned on. That is, in this case, the MOS transistor
2
is turned on although the switching signal {overscore (S)} indicates ‘OFF’. Such a phenomenon can be referred to as an “erroneous turning-on”.
When the above described erroneous turning-on occurs in the MOS transistor
2
with the MOS transistor
1
already set in the ON state, these two transistors are simultaneously set in the ON state. This state terminates when the MOS transistor
2
is turned off in the following operation.
(1) The voltage between the gate and the source of the transistor M
6
exceeds the threshold when the electric potential rises at the point VL.
(2) The transistor M
6
is set in the ON state after the step (1) above.
(3) The transistor Q
7
is set in the ON state after the step (2) above.
(4) A base current is applied to the transistor Q
8
after the step (3) above, and the transistor Q
8
is turned on.
(5) An electric charge is removed from the gate of the MOS transistor
2
after the step (4) above, and the MOS transistor
2
is turned off.
The operations in the steps (1) through (5) above require some time. In addition, when the threshold of the transistor M
6
is large, the transistor M
6
cannot be easily turned on depending on when the potential rises at the point V
L
. In this case, the MOS transistor
2
keeps the ON state for a relatively long time.
As described above, in the conventional driving circuit, if one of a set of interconnected switching elements is turned on, an erroneous turning-on arises at the other switching element, and a set of switching elements simultaneously enter the ON state, then the circuit cannot exit the state within a short time, or cannot exit the state. Such a state not only keeps the operation of the circuit (load) in an instable state, but also may lead the switching element itself into destruction.
SUMMARY OF THE INVENTION
The present invention aims at preventing an erroneous turning-on of a set of interconnected switching elements, or reducing the influence of the erroneous turning-on.
The driving circuit according to the present invention is based on the configuration for driving the first and second interconnected switching elements. The circuit includes an electric charge removing unit, connected to the control terminal of the first switching element, for removing an electric charge from the control terminal of the first switching element according to the control signal; and a capacitor connected between the electric charge removing unit and the connection point between the first and second switching elements. The electric charge removing unit removes the electric charge from the control terminal of the first switching element according to the signal input through the capacitor.
With the above described configuration, if an electric potential at the connection point between the first and second switching elements changes when the second switching element is switched, then a signal indicating the change is input to the above described electric charge removing unit through the capacitor.
The electric charge removing unit removes the electric charge from the control terminal of the first switching element according to the signal through the capacitor. Thus, the first switching

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