Circuit for driving bus

Details Circuit for driving bus Circuit for driving bus

2008-07-01

2008-07-01

Barnie, Rexford (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

C326S011000

Reexamination Certificate

active

07394285

ABSTRACT:
A bus driving circuit includes a majority voter unit for comparing the number of logic high level bits with the number of logic low level bits among a predetermined number of bits of data; a latch unit for latching a first output signal in response to the compared result; and a flip-flop unit for latching the predetermined number of bits of data in synchronization with the clock; and a selection unit for selecting one of the latched data of the flip-flop unit and an inverted output of the latched data of the flip-flop unit according to the first output signal.

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Kazuyuki Nakamura et al., “A 50% Noise Reduction Interface Using Low-Weight Coding”, 1996 Symposium on VLSI Circuits Digest of Technocal Papers, 1996 IEEE (pages 144-145).

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