Circuit for determining the time difference between edges of...

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Reexamination Certificate

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Details

C327S159000, C327S166000

Reexamination Certificate

active

07039143

ABSTRACT:
The circuit has a first input for supplying a first signal (S1) to a series circuit made from a plurality of basic elements. Each basic element has a memory (M) for storing the signal level which is applied to the input of the basic element, and the output of a storage element (M) is connected to the input of a next basic element. Furthermore, the circuit has a second input for supplying a second signal (S2) which is connected to a control input of each basic element. Given a first level of the second signal, the storage elements (M) take up the signal level stored in the preceding storage element, and given a second level of the second signal, the storage elements (M) retain the signal level respectively stored in them. Furthermore, the circuit has comparator units (XOR) to which, in each case, the signal levels stored by the storage units (M) of two adjacent basic elements are supplied.

REFERENCES:
patent: 4721905 (1988-01-01), Mehrgardt
patent: 5245231 (1993-09-01), Kocis et al.
patent: 5818890 (1998-10-01), Ford et al.
patent: 6040725 (2000-03-01), Lee et al.
patent: 195 06 543 (1996-05-01), None
patent: 0 576 150 (1993-12-01), None
patent: 0 576 150 (1993-12-01), None
patent: 0 639 004 (1995-02-01), None

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