Electronic digital logic circuitry – Reliability
Patent
1996-05-31
1998-09-15
Santamauro, Jon
Electronic digital logic circuitry
Reliability
326 26, 326 82, 361 93, 327323, H03K 19003, H03K 1908
Patent
active
058084770
ABSTRACT:
A sense and protection circuit against short circuits for digital outputs, comprising a logic gating circuit of the exclusive OR type (EX1) which has a first input terminal connected to a signal input node (IN) and an output terminal which is connected to an input terminal of a signal level shifter output stage (B). A second logic gating circuit of the exclusive OR type (EX2) has a first input terminal connected to the input node (IN) and a second input terminal connected, through an inverting circuit (IN1), to an output terminal (OUT) of the output stage (B). A second input terminal of the first logic gate circuit is coupled to an output terminal of the second logic gate circuit through a comparator circuit (SCH1) and a delay circuit means (C,R,D).
REFERENCES:
patent: 4342065 (1982-07-01), Larson
patent: 4875000 (1989-10-01), Fry et al.
patent: 4884165 (1989-11-01), Kong et al.
patent: 5256914 (1993-10-01), Boomer
Patent Abstracts of Japan, vol. 18, No. 161 (E-1526) 17 Mar. 1994, and JP-A-05 335 926 (NEC Corp.) 17 Dec. 1993.
Patent Abstracts of Japan, vol. 8, No. 95, (E-242) (1532), 2 May 1984, and JP-A-59 012 625 (Nippon Denki K.K.).
Fucili Giona
Gola Alberto
Leone Marcello
Milazzo Patrizia
Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
Santamauro Jon
SGS--Thomson Microelectronics S.r.l.
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