Circuit for detecting the disappearing of a periodic signal

Electronic digital logic circuitry – Multifunctional or programmable – Sequential or with flip-flop

Reexamination Certificate

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Details

C327S048000

Reexamination Certificate

active

06246261

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a circuit for detecting the disappearing of a signal, especially of a periodic logic signal.
BACKGROUND OF THE INVENTION
Many electronic devices use for their operation one or several periodic logic signals, for example to synchronize a phase-locked loop or to be used as clock signals. For different reasons, the periodic input signal provided to a device may disappear and cause a malfunction of the device. Further, in some cases, when for example a CRT control device receives a periodic horizontal synchronization signal to generate control signals for the tube deviator, the disappearing of the horizontal synchronization signal can result in the generation of inappropriate control signals and the destruction of the deviator.
When such periodic signals are compulsory for some devices, a conventional solution consists of very clearly specifying in the technical instructions of the devices which signals must imperatively be provided during operation to avoid damage.
Although it is always possible to use this solution, it is preferable to detect the disappearing of the periodic logic input signal that can cause a serious malfunction and, as soon as this detection is achieved, to modify the device operation to avoid any risk of damage.
Further, it is very important to be able to perform this detection very fast, to limit damage that may occur between the signal disappearing and the detection of this disappearing.
SUMMARY OF THE INVENTION
The present invention provides a circuit enabling fast detection of the disappearing of a signal, and in one embodiment, for detecting the cessation of a periodic logic input signal.
The circuit for detecting the disappearing of a periodic input signal includes a frequency divider receiving the input signal, having two complementary inputs combined with a same reference signal of same frequency as the input signal by means of two respective similar logic gates, the output of a first one of the logic gates being connected to increment a first counter and to reset a second counter similar to the first one, and the output of the second logic gate being connected to increment the second counter and to reset the first counter, wherein a logic circuit generates a disappearing detection signal when any one of the two counters reaches a predetermined value.
According to an embodiment of the invention, the frequency divider is a divider by two.
According to an embodiment of the invention, the logic gates are AND gates.
According to an embodiment of the invention, the counters are shift registers, each including three series-connected D flip-flops, and the logic circuit is an OR gate connected to the output of the third flip-flop of each of the two counters.


REFERENCES:
patent: 4311962 (1982-01-01), Titsworth
patent: 4622481 (1986-11-01), Nortrup
patent: 4914680 (1990-04-01), Tanno et al.
patent: 5138636 (1992-08-01), Bardin
patent: 01288914 (1989-11-01), None
patent: 04306930 (1992-10-01), None
patent: 08316946 (1996-11-01), None

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