Circuit for data synchronization of I2C time controller in...

Computer graphics processing and selective visual display system – Display driving control circuitry – Display power source

Reexamination Certificate

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C345S534000, C345S698000

Reexamination Certificate

active

08063898

ABSTRACT:
A method of controlling an interface between an I2C master in a time controller for a liquid crystal display and an external memory may include causing a pre-scaler to determine whether or not a first clock signal from the I2C master to the external memory is synchronized with a second clock signal from the external memory to the I2C master. If the first clock signal is not synchronized with the second clock signal, the pre-scaler stops transmission of a third clock signal for an I2C interface with the external memory to the I2C master.

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patent: 6037925 (2000-03-01), Kim
patent: 6088829 (2000-07-01), Umemura et al.
patent: 6175361 (2001-01-01), Du et al.
patent: 6757213 (2004-06-01), Kinoshita
patent: 7167938 (2007-01-01), Noda
patent: 2007/0186072 (2007-08-01), Woo
patent: 2010/0223486 (2010-09-01), Deshpande
patent: 10-0178588 (1999-05-01), None
patent: 10-0610702 (2006-08-01), None

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