Circuit for controlling the clock supplied to a state...

Electrical computers and digital processing systems: support – Clock control of data processing system – component – or data... – Inhibiting timing generator or component

Reexamination Certificate

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Details

C713S322000, C713S323000, C713S600000

Reexamination Certificate

active

07039826

ABSTRACT:
In a clock generating circuit, clocks generated therein are distributed by a clock distribution control circuit for every circuit block. In a clock output control circuit, a clock command is decoded by a clock command decoder and output of the clocks is controlled for every circuit block. A data transfer control device having a clock control circuit functions as a first device or a second device to transfer data as a host or a peripheral. When the data transfer control device function as a second device and in an idle state, it controls clock output to a state controller which controls switching between a host function and a peripheral function.

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patent: A-2002-091603 (2002-03-01), None
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“Microsoft Computer Dictionary”, 2002, Microsoft Corporation, Fifth Edition, p. 76.
U.S. Appl. No. 10/376,548, filed Mar. 4, 2003, Saito et al.
U.S. Appl. No. 10/379,727, filed Mar. 6, 2003, Saito et al.
Saito, “OTG Controller LSI Taking Reduction of CPU Load into Consideration”, Design Wave Magazine, Apr. 2002, pp. 82-88.

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