Circuit for controlling a flash EEPROM having three distinct mod

Details Circuit for controlling a flash EEPROM having three distinct mod Circuit for controlling a flash EEPROM having three distinct mod

1990-02-20

1990-11-13

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Erase

36518901, 36518903, 36518905, 36523002, 36523006, G11C 1300

Patent

active

049706926

ABSTRACT:
An EEPROM receives a first address from a microprocessor. If the first address equals a first predetermined value, the EEPROM goes into a programming mode. If the first address equals a second predetermined value, the EEPROM goes into an erase mode. The EEPROM interprets a second address received from the microprocessor as indicating the location where data is to be stored in the EEPROM. The EEPROM generates an internal write pulse which remains active until the EEPROM receives a subsequent write instruction from the microprocessor. In this way, it is not necessary to generate a wait instruction to the microprocessor to halt the microprocessor while the EEPROM is storing data. Also, it is not necessary to provide additional circuitry to control whether the EEPROM goes into the erase or programming modes.

REFERENCES:
patent: 4412309 (1983-10-01), Kuo
patent: 4623990 (1986-11-01), Allen et al.
patent: 4698750 (1987-10-01), Wilkie et al.
patent: 4752871 (1988-01-01), Sparks et al.
patent: 4763305 (1988-08-01), Kuo
patent: 4785425 (1988-11-01), Lavelle
patent: 4811294 (1989-03-01), Kobayashi et al.
Samba Murthy, "EEPROM Programs in a Flash", The Electronic System Design Magazine, Apr. 1987, pp. 78-79 and 80.
"Microprocessor Interfacing with SEEQ's Flash (TM) EEPROMS", SEEQ Technology, Incorporated, pp. 6-2 thru 6-12.
Xicor Data Book, published in May 1985, by Xicor, Inc., pp. 3-75 to 3-80.

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