Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
1998-08-13
2001-03-27
Zarabian, A. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S225700
Reexamination Certificate
active
06208568
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates generally to integrated circuits and in particular the present invention relates to cancelling and replacing redundant elements in integrated circuits.
BACKGROUND OF THE INVENTION
As the number of electronic elements contained on semiconductor integrated circuits continues to increase, the problems of reducing and eliminating defects in the elements becomes more difficult. To achieve higher population capacities, circuit designers strive to reduce the size of the individual elements to maximize available die real estate. The reduced size, however, makes these elements increasingly susceptible to defects caused by material impurities during fabrication. These defects can be identified upon completion of the integrated circuit fabrication by testing procedures, either at the semiconductor chip level or after complete packaging. Scrapping or discarding defective circuits is economically undesirable, particularly if only a small number of elements are actually defective.
Relying on zero defects in the fabrication of integrated circuits is an unrealistic option. To reduce the amount of semiconductor scrap, therefore, redundant elements are provided on the circuit. If a primary element is determined to be defective, a redundant element can be substituted for the defective element. Substantial reductions in scrap can be achieved by using redundant elements.
One type of integrated circuit device which uses redundant elements is electronic memory. Typical memory circuits comprise millions of equivalent memory cells arranged in addressable rows and columns. By providing redundant elements, either as rows or columns, defective primary rows or columns can be replaced. Thus, using redundant elements reduces scrap without substantially increasing the cost of the memory circuit.
Because the individual primary elements of a memory are separately addressable, replacing a defective element typically comprises blowing fuse-type circuits to ‘program’ a redundant element to respond to the address of the defective element. This process is very effective for permanently replacing defective primary elements. A problem with this process is the possibility of replacing a defective primary element with a defective redundant element. The possibility of having a defective redundant element increases as the number of redundant elements on an integrated circuit increases. Because the process of replacing defective elements is a permanent solution, if a defective redundant element is used, the circuit must be scrapped.
The number of redundant elements provided on a circuit usually exceeds the number of redundant elements needed to ‘repair’ a defective chip, therefore it would be desirable to replace the defective redundant element with another available redundant element.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a circuit and method for cancelling and replacing defective redundant electronic elements on an integrated circuit.
SUMMARY OF THE INVENTION
The above mentioned problems with repairing defective redundant elements and other problems are addressed by the present invention and which will be understood by reading and studying the following specification. A circuit and method are described which provide for cancelling and replacing defective redundant elements in an integrated circuit, electronic memory or other electronic device.
In particular, the present invention describes an integrated circuit having a plurality of selectively addressable primary elements and a plurality of selectively programmable redundant elements. The integrated circuit comprises an enable circuit used for enabling one of the redundant elements, a program circuit for selectively programming the enabled redundant element. The programmed redundant element, therefore, can be used to replace a defective primary element. The integrated circuit also has a non-volatile disable circuit for disabling the enabled redundant elements.
In another embodiment, an integrated circuit memory array is described. The memory array has a plurality of selectively addressable primary memory elements and a plurality of selectively programmable redundant memory elements. The integrated circuit memory comprises an enable circuit for enabling one of the redundant memory elements, a program circuit for selectively programming the enabled redundant memory element to replace a defective primary memory element, and a non-volatile disable circuit for disabling the enabled redundant memory element
In another embodiment, the enable circuit comprises a blowable fuse. One embodiment of the disable circuit comprises a latch circuit for indicating when an enabled redundant memory element is addressed, and a fuse circuit for producing an output used to disable the enabled redundant memory element. The fuse circuit can comprise a selectively blowable anti-fuse. The fuse circuit can alternatively comprise a high voltage P-channel transistor having its drain connected to a low voltage line, and an anti-fuse electrically connected between a variable voltage source and a source of the high voltage P-channel transistor.
Still another embodiment of the invention provides a method of repairing a selectively addressable defective primary element in an integrated circuit. The method comprises the steps of programming a first redundant element to respond to an address of the defective primary element and enabling the first redundant element. If the first redundant element is defective, the first redundant element is disabled and a second redundant element is programmed and enabled to respond to an address of the defective primary element. A method of cancelling a defective redundant element is also provided. To cancel a defective element, the defective redundant element is addressed and an anti-fuse circuit is selectively blown to permanently disable the redundant element.
A final embodiment provides a method of modifying an integrated circuit having a plurality of redundant elements. The method comprises the step of permanently replacing one redundant element with a second redundant element.
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Ong Adrian E.
Zagar Paul S.
Micro)n Technology, Inc.
Schwegman Lundberg Woessner & Kluth P.A.
Zarabian A.
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