Circuit for calibrating impedance and semiconductor...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination

Reexamination Certificate

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C326S082000

Reexamination Certificate

active

07990174

ABSTRACT:
A circuit for calibrating impedance includes an enable signal generator, a code generator and a connection controller. The enable signal generator generates an enable signal in response to a chip selection signal. The code generator generates an impedance calibration code in response to the enable signal by using an external resistance coupled to an electrode. The connection controller controls connection between the code generator and the electrode in response to the enable signal.

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patent: 7528626 (2009-05-01), Kim
patent: 7773440 (2010-08-01), Kim et al.
patent: 2007/0132493 (2007-06-01), Fujisawa et al.
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patent: 2009/0009212 (2009-01-01), Brox
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patent: 2008-228276 (2008-09-01), None
patent: 1020050100290 (2005-10-01), None
patent: 10-0541557 (2005-12-01), None
patent: 1020050118751 (2005-12-01), None

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