Circuit for and method of realigning data

Details Circuit for and method of realigning data Circuit for and method of realigning data

2008-07-08

2008-07-08

Chen, Alan S. (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Flow controlling

C710S030000, C710S033000, C710S051000, C710S065000

Reexamination Certificate

active

10800367

ABSTRACT:
A circuit enabling the realignment of data is described. The circuit generally comprises an input multiplexer receiving a first plurality of input data bytes and a second plurality of input data bytes; a switching controller coupled to the input multiplexer and controlling the output of the data bytes from the input multiplexer; a delay register coupled to the input multiplexer and receiving predetermined bytes of the first plurality of input data bytes; and an output multiplexer coupled to the input multiplexer and the delay register. The output multiplexer receives the predetermined bytes of the first plurality of input data bytes and predetermined bytes of the second plurality of input data bytes.

REFERENCES:
patent: 5517627 (1996-05-01), Petersen
patent: 6112297 (2000-08-01), Ray et al.
patent: 2001/0017859 (2001-08-01), Laubner et al.
patent: 2003/0018837 (2003-01-01), Hussain et al.

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