Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2005-02-15
2005-02-15
Cho, James H. (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S021000, C333S032000
Reexamination Certificate
active
06856165
ABSTRACT:
In a circuit arrangement for adapting the characteristic wave impedance at line ends of a vehicle data bus having at least two data bus lines and data terminals, each with a transceiver unit for differential-mode signal transmission on the data bus, the data bus is connected to the transceiver unit via a connection interface that includes a reactor for filtering interference on the data bus and an adaptation resistor network for adapting the characteristic wave impedance of a data bus line. The adaptation resistor network is arranged between the reactors and the respective line ends of the data bus lines, while the adaptation resistor network connects the line ends to ground via a capacitor.
REFERENCES:
patent: 5467455 (1995-11-01), Gay et al.
patent: 5835535 (1998-11-01), Patel et al.
patent: 6690191 (2004-02-01), Wu et al.
patent: 196 36 816 (1996-11-01), None
Drosseln sichern EMV auf Kfz-Bussystemen, Kurt Marth, Components 31 (1993) Heft 5, pp. 172-174.
Cho James H.
Crowell & Moring LLP
Daimler-Chrysler AG
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