Circuit element on a single ended interconnection for generating

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Details

395845, 395878, G06F 104

Patent

active

056757743

ABSTRACT:
Disclosed is a Data Valid/Finish circuit element, an integrated circuit using the element, and a method of using the element. The circuit element, which may be incorporated in high speed, digital integrated circuit chips, has an input for receiving input from a data stream, and outputs. One of the outputs is an output true for generating a logical "1" when the input is a logical "1". The other output is an output complementary means for generating a logical "1" when the input is a logical "0". The system logically combines the outputs through an output finish/clock for receiving and combining the outputs of the output true and the output complementary. This generates a logical signal when the input from the data stream is either a logical "0" or a logical "1".

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