Circuit, device, and method to detect voltage leakage

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365201, G11C 2900

Patent

active

051174260

ABSTRACT:
In memory devices, and particularly in dynamic random access memory devices that use boosted word lines, voltage leakage in word lines and transfer gates to memory cells cause data error. A circuit, device, and method to detect voltage leakage is disclosed. The test circuit includes a sample and hold circuit that is connected to the word line of an addressed memory cell to store the voltage level on the word lines as it charges. A comparator is connected to compare the stored voltage level with the voltage level on the word line after it is charged and to indicate if the voltage level of the word line falls below a predetermined amount. The circuit can detect a voltage differential as small as 50 millivolts for a high resistance short as large as 2 megaohms in about 200 nanoseconds. The circuit can be incorporated into a random access memory device thereby significantly increasing the speed at which all memory cells and word lines can be tested. The method disclosesd a process for testing word line to memory cell leakage.

REFERENCES:
patent: 4412327 (1983-10-01), Fox et al.
patent: 4416057 (1983-11-01), Tardy
patent: 4672501 (1987-06-01), Bilac et al.
patent: 4692900 (1987-09-01), Ooami et al.
patent: 4720818 (1988-01-01), Takeguchi
patent: 4905194 (1990-02-01), Ohtsuka et al.

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