Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2001-03-30
2003-09-09
Callahan, Timothy P. (Department: 2816)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
06618834
ABSTRACT:
BACKGROUND OF THE INVENTION
1) Field of the Invention
This invention relates to a circuit designing apparatus, a circuit designing method and a timing distribution apparatus suitable for use for designing, for example, a large scale circuit.
2) Description of the Related Art
Generally, in order to design a circuit of a semiconductor chip (hereinafter referred to as semiconductor circuit) or an entire electronic apparatus such as a semiconductor device or a printed board or a component of an electronic apparatus or a subsystem (hereinafter referred to as system circuit), a designer (user) uses a technique called division design wherein the entire circuit is divided into two or more units and the individual units are designed independently of one another.
The unit signifies an element having a predetermined circuit function and is called circuit module or module. In the following description, in order to distinguish a unit before processed and a unit after processed, the unit before processed is referred to as unit to be processed or unit of a design object. Meanwhile, the unit after processed is referred to as processed unit.
A technique of designing a unit in a condition wherein it contains or includes another unit designed independently is called hierarchical design. The hierarchical design has a hierarchical characteristic in that the contained unit is hierarchically lower and the containing unit is hierarchically higher. Division circuit designed partially are finally aggregated into a single unit wherein the hierarchically highest layer is the entire circuit. In the following description, the term hierarchical design generally signifies division design.
FIG. 43
illustrates a concept of hierarchical design. Referring to
FIG. 43
, a semiconductor circuit (which may be hereinafter referred to as chip)
100
is a circuit of the hierarchically highest layer and contains a pair of circuit modules (a circuit module may be hereinafter referred to merely as module)
100
x
and
100
y
. The module
100
x
contains a pair of modules
101
x
and
102
x
, and the module
100
y
contains a pair of modules
101
y
and
102
y
. Further, the modules
101
x
and
101
y
contain modules
103
x
and
103
y
, respectively, and the modules
102
x
and
102
y
contain modules
104
x
and
104
y
, respectively. Thus, a designer can design the individual modules independently of one another, and this augments the design efficiency.
Since the circuit scale increases year by year, it is demanded for a circuit designing apparatus (which may be hereinafter referred to merely as designing apparatus) to have a capability of processing a greater amount of data.
On the other hand, to design an entire semiconductor circuit collectively without using hierarchical design is called collective design. The collective design is not applied to design of a circuit of a scale greater than a certain scale principally by reason of the hardware capacity of a designing apparatus, and the hierarchical design is used popularly.
In particular, a working memory is restricted in capacity and also in processing time. A designing apparatus uses a large working memory area for processing required due to change of a circuit and so forth. Processing for circuit change or the like is described with reference to
FIGS. 44
to
46
.
FIG. 44
is a block diagram of a semiconductor circuit designing apparatus. Referring to
FIG. 44
, the designing apparatus
500
shown is used to design a semiconductor circuit and includes an automatic design processing section
200
and a circuit information database
300
. The circuit information database
300
stores information of circuit elements such as, for example, flip-flops and registers. The automatic design processing section
200
executes circuit designing and includes a hardware description language (HDL) conversion processing section
200
a
, a peculiarizing processing section
200
b
, a test circuit production processing section
200
c
, a load adjustment processing section
200
d
, and an HDL output processing section
200
e.
The HDL conversion processing section
200
a
HDL-converts an HDL source code (which may be hereinafter referred to simply as source code) to obtain a unit to be processed and stores the unit into the circuit information database
300
. The peculiarizing processing section
200
b
allocates a name of a different module produced as a result of circuit change by the designer so that it may not overlap with any other name and makes intrinsic.
The test circuit production processing section
200
c
produces a test circuit and produces information such as a hierarchical layer name, a name of an additional terminal or an additional gate, and a connection order between modules. The load adjustment processing section
200
d
adjusts the load to a module and produces information such as a hierarchical layer name, an input terminal load, and a driving capacity of an output terminal. The HDL output processing section
200
e
causes a result of the processes performed in this manner to be reflected on the source code.
Where a plurality of circuits having the same function are required in designing of a large scale circuit, a technique called plural reference is used. The plural reference is a technique wherein a module having a necessary function is designed as a unit to be processed and a higher hierarchical layer refers to the unit to be processed by a plurality of times. Consequently, the designer can omit repetitive arrangement of a module, can load information regarding the same module into a working memory and can prevent redundancy in repeated calculation. It is to be noted that, in contrast to the plural reference, a unit which is referred to only once is called a unit of single reference. Now, peculiarizing is described with reference to FIGS.
45
(
a
) and
45
(
b
).
FIGS.
45
(
a
) and
45
(
b
) are diagrammatic views illustrating a peculiarizing process. A chip
150
a
shown in FIG.
45
(
a
) is a circuit before peculiarizing and includes two modules
151
each having a module
151
a
(represented by A). Information of the modules
151
a
is written as a data image
154
a
(represented by A) in the circuit information database
300
.
Meanwhile, a chip
150
b
shown in FIG.
45
(
b
) is a circuit after peculiarizing and includes a module
151
and another module
152
. The module
152
is obtained by peculiarizing of the module
151
and has a module
152
a
(represented by A′) duplicated from the contained module circuit. Information of the modules
151
a
and
152
a
is written as data images
154
b
(represented by A-0) and
154
c
(represented by A-1) in the circuit information database
300
, respectively.
The chip
150
a
shown in FIG.
45
(
a
) has a unit (for example, the module
151
) plural-referred to within a certain period of a design step (which may be hereinafter referred to merely as step). The peculiarizing process signifies a process necessary for a designer to change a unit which is plural-referred to so that it may be placed into a state wherein it can be single-referred to as seen in FIG.
45
(
b
) in the later process.
More particularly, the designer processes to duplicate a unit (module
151
) by a number of times by which the unit has been referred to and change the names of the duplicates so as to change the module into units which are single-referred to. For example, in the example shown in FIG.
45
(
b
), only one duplicate is produced. Upon such duplication, peculiar names A-0 and A-1 are allocated to the original module
151
a
and the duplicated module
152
a
, respectively, and consequently, the designer can distinguish the two modules from each other.
Further, in
FIG. 44
, the peculiarizing processing section
200
b
writes such changes in the individual steps into the circuit information database
300
, thereby completing the peculiarizing process. Thereafter, the test circuit production processing section
200
c
and the load adjustment processing section
200
d
read out the contents changed by the peculiarizing proces
Itaya Koichi
Takagi Miki
Takeyama Hiroji
Yamazaki Takehiro
Callahan Timothy P.
Fujitsu Limited
Nguyen Minh
Staas & Halsey , LLP
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