Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
1999-12-06
2002-05-21
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C257S359000, C257S360000, C257S491000, C216S067000, C326S009000, C326S047000, C326S048000, C326S050000, C326S103000
Reexamination Certificate
active
06393603
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to design of an integrated circuit device, and more particularly to a method and an apparatus for designing an integrated circuit device which comprises a transistor having a gate oxide film connected to conductive members.
2. Description of the Related Art
Presently, various integrated circuit devices are utilized in various electronic equipment. Such integrated circuit devices typically have various circuit components formed with a thin film technique. Such circuit components formed in an integrated circuit device with a thin film technique include a transistor whose gate oxide film may be connected to conductive members.
For example, in integrated circuit device
1
in the process of fabrication illustrated in
FIG. 1
, transistor
2
has gate oxide film
3
connected to gate electrode
4
and metal wire
5
as conductive members, and metal wire
5
is disposed on an upper surface of insulating layer
6
which is an insulating member. Photoresist
7
which is an insulating member is temporarily stacked as a mask on an surface of metal wire
5
. Metal wire
5
is processed with anisotropic etching using plasma with photoresist
7
as a mask.
In integrated circuit device
1
in the aforementioned state, side surfaces of metal wire
5
are exposed to plasma and may be subjected to charge in the plasma at the anisotropic etching of metal wire
5
. Since the charge entered by metal wire
5
flows from gate electrode
4
to semiconductor substrate
8
through gate oxide film
3
, gate oxide film
3
may be damaged.
The presence or absence of the damage results from the density of the charge flowing through gate oxide film
3
, and the charge density results from the intensity of the plasma, the area of gate oxide film
3
and the antenna size of metal wire
5
. In other words, if the intensity of plasma used in the fabrication process is known, design may be performed only in consideration of the area of gate oxide film
3
and the antenna size of metal wire
5
.
Thus, conventionally, a maximum antenna size M
1
of conductive members allowed with respect to a reference area S
1
of a gate oxide film is defined, and the ratio of the two is represented as an antenna ratio R, as follows:
R=M
1
/
S
1
When a gate oxide film with an area S
2
is newly formed, an antenna size M
2
of conductive members connected thereto can prevent damage to the gate oxide film if it is set as follows:
M
2
≦
R×S
2
It should be noted that the antenna size of conductive members refers to the size of portions of the conductive members which serve as an antenna, for example the area of exposed portions of the metal wire as described above. However, when a reference metal wire and a new metal wire have the same film thickness, the antenna size can be approximated by the area of an upper surface of the metal wire if only the upper surface of the metal wire is exposed, while the antenna size can be approximated by the entire periphery of the metal wire if only side surfaces thereof are exposed.
When a structure having conductive members connected to a gate oxide film is formed, any charge in plasma entered by the conductive members does not damage the gate oxide film if the relationship of an area S of the gate oxide film and an antenna size M of the conductive members to an antenna ratio R satisfies the following expression:
M≦R×S
However, when a maximum antenna size M
1
of conductive members allowed with respect to a reference area S
1
of a gate oxide film is specified, the specified ratio used as an antenna ratio R for calculating a maximum antenna size M
2
with respect to a new area S
2
revealed that the resulting antenna size M
2
is inappropriate.
For example, assuming that a new area S
2
being a double reference area S
1
, a new maximum antenna size M
2
is also a double reference maximum antenna size M
1
in the conventional approach. Actually, however, experiments show that the antenna size M
2
more than doubles the antenna size M
1
is allowed.
Additionally, assuming that a new area S
2
is a half of a reference area S
1
, a new maximum antenna size M
2
is also a half of a reference maximum antenna size M
1
in the conventional approach. Actually, however, it has been shown that the antenna size M
2
needs to be smaller than a half of the antenna size M
1
.
Specifically, changes in antenna size M of conductive members have been conventionally considered to be directly proportional to changes in area S of a gate oxide film at a certain antenna ratio R, which proved not to fit the actual conditions. As a result, the conventional approach can not form conductive members in a proper shape, thereby making it difficult to optimize integrated circuit devices.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a circuit design method and apparatus for optimally designing an integrated circuit device.
It is another object of the present invention to provide an information storage medium for storing a program for optimally designing an integrated circuit device.
It is further object of the present invention to provide an integrated circuit device in which conductive members connected to a gate oxide film of a transistor are formed in a proper shape.
A conventional circuit design method to which the present invention is applied is for designing an integrated circuit device having a transistor with a gate oxide film connected to conductive members wherein a maximum antenna size M
1
of the conductive members allowed with respect to a reference area S
1
of the gate oxide film is defined.
In a first aspect of the circuit design method of the present invention, when a gate oxide film having an area S
2
larger than the area S
1
is newly designed, a maximum antenna size M
2
of new conductive members allowed with respect to the area S
2
is set as follows:
M
2
>
M
1
×(
S
2
/
S
1
).
When a gate oxide film having an area S
2
smaller than the area S
1
is newly designed, a maximum antenna size M
2
of new conductive members allowed with respect to the area S
2
is set as follows:
M
2
<
M
1
×(
S
2
/
S
1
).
In a second aspect of the circuit design method of the present invention, an area S
2
of a new gate oxide film and a maximum antenna size M
2
of new conductive members are set to satisfy the following relationship:
M
2
=
M
1
×(
S
2
/S
1
)
1/b
where b is a predetermined constant.
In a third aspect of the circuit design method of the present invention, an area S
2
of a new gate oxide film and a maximum antenna size M
2
of new conductive members are set to satisfy the following relationship:
M
2
=
d
×(
M
1
/
d
)
(S2/S1)
where d is a predetermined constant.
In the aforementioned circuit design method, the constant b may satisfy 0.5≦b≦0.8.
In the aforementioned circuit design method, the constant d may satisfy 0.5≦d≦3.0.
In a first aspect of a circuit design apparatus of the present invention, data storage means stores an allowed maximum antenna size M
1
of conductive members and a reference area S
1
of a gate oxide film, and upon data input of an area S
2
of a new gate oxide film to data input means, calculation means calculates a maximum antenna size M
2
of new conductive members allowed with respect to the input area S
2
as follows:
M
2
=
M
1
×(
S
2
/S
1
)
1/b
where b is a predetermined constant.
In a second aspect of the circuit design apparatus of the present invention, data storage means stores an allowed maximum antenna size M
1
of conductive members and a reference area S
1
of a gate oxide film, and upon data input of an area S
2
of a new gate oxide film to data input means, calculation means calculates a maximum antenna size M
2
of new conductive members allowed with respect to the input area S
2
as follows:
M
2
=
d
×(
M
1
/
d
)
(S2/S1)
where d is a predetermined constant.
An information storage medium of the present invention stores programs for causing a computer to p
Kik Phallaka
NEC Corporation
Scully Scott Murphy & Presser
Smith Matthew
LandOfFree
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