Electronic digital logic circuitry – Multifunctional or programmable – Array
Patent
1992-12-17
1995-09-26
Harvey, Jack B.
Electronic digital logic circuitry
Multifunctional or programmable
Array
326 9, 39518501, G06F 124, G06F 1130
Patent
active
054541131
ABSTRACT:
A control unit is controlled by a computer having a reset input. A circuit configuration protects the operation of the control unit by placing a signal at the reset input for restarting the computer in the event of a malfunction. The circuit configuration includes a first register into which a predetermined bit pattern is written in read-only fashion; a second check register in which a single defined bit is set at a time after individual program routines have been executed; a counter timer; and a comparator connected to the first register, to the second check register and to the counter timer, for comparing contents of the second check register with contents of the first register and outputting a reload signal for reloading the counter timer if the contents match.
REFERENCES:
patent: 4594685 (1986-06-01), Owens
patent: 4696002 (1987-09-01), Schleupen et al.
patent: 4794558 (1988-12-01), Thompson
patent: 4956807 (1990-09-01), Hosaka et al.
patent: 5012435 (1991-04-01), Bailey et al.
patent: 5333285 (1994-07-01), Drerup
Publication: Electronic Design 2, Jan. 18, 1977, pp. 90 and 92.
Flaig Jorg
Graf Friedrich
Niedermeier Ernst
Staerker Klaus
Auve Glenn A.
Greenberg Laurence A.
Harvey Jack B.
Lerner Herbert L.
Siemens Aktiengesellschaft
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