Circuit configuration and method for automatic recognition and e

Details Circuit configuration and method for automatic recognition and e Circuit configuration and method for automatic recognition and e

1999-03-26

2000-09-26

Nelms, David

Static information storage and retrieval

Read/write circuit

Bad bit

3652257, G11C 700

Patent

active

06125066&

ABSTRACT:
A circuit configuration and a method for automatic recognition and elimination of word line/bit line short circuits in a memory cell configuration containing sensor amplifiers, in which the sensor amplifiers split the memory cell configuration into memory blocks. To this end, a fuse is provided in the bit lines in each memory block upstream of the respective sensor amplifiers, the fuse being blown as a result of an appropriate voltage difference being applied in a test mode.

REFERENCES:
patent: 4485459 (1984-11-01), Venkateswaran
patent: 5134584 (1992-07-01), Boler et al.
patent: 5768206 (1998-06-01), McClure

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