Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2003-01-17
2004-08-31
Wilczewski, Mary (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S773000, C257S774000, C257S700000
Reexamination Certificate
active
06784530
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a circuit component built-in module and a method for manufacturing the same. More specifically, it relates to a method for manufacturing a circuit component built-in module, in which semiconductor chips are incorporated in electrical insulating substrates for reducing the thickness and forming a stacked module, whereby the high-density mounting of components is achieved.
2. Related Background Art
Following the tendency of electronic information devices toward high performance and compact size so as to be fit for the information communication industry that has developed remarkably in recent years, it is increasingly demanded to achieve high density, improved function, and shortened wiring of circuit components used in such electronic information devices. To achieve such characteristics, it is demanded increasingly to reduce the thickness of a module incorporating a circuit component or an electronic element significantly, namely, a circuit component built-in module.
Since the technique of mounting a circuit component on a surface of a substrate only has a limited capability of reducing the thickness of a circuit component, another technique has been proposed in which a recess is provided in the substrate and a semiconductor chip is arranged therein so as to make the substrate thinner, whereby the high-density mounting of circuit components is attempted (JP 5(1993)-259372A, JP 11(1999)-103147 A, JP 11(1999)-163249 A). In this technique, after an active component such as a semiconductor chip is mounted on a recess of a substrate, a resin is applied to the recess so as to seal and protect connected portions where the semiconductor chip and the substrate are connected, as well as the semiconductor chip.
Furthermore, another technique has been proposed in which circuit substrates are stacked so as to achieve the high-density mounting. Since a conventional technique in which a through hole structure is formed by drilling a substrate that is formed by impregnating a glass fiber cloth with an epoxy resin (glass-epoxy substrate) has a limited capability for achieving the high densification, there arises a problem that connections of wiring patterns between large scale integrated circuits (LSI) and between components cannot be achieved with minimum distances. However, to solve this problem, the inner via hole connecting technique has been proposed (JP 63(1988)-47991 A, JP 6(1994)-268345 A). Such an inner via hole connecting technique allows only specific laminated layers to be connected with each other, thereby having excellent semiconductor chip mounting characteristics.
Furthermore, JP 11(1999)-220262 A has proposed, as an example of a circuit component built-in module, a module with high heat dissipating ability in which a semiconductor chip is built in a circuit substrate with high heat conductivity and a multiplicity of such circuit substrates are stacked.
As another known example, ICEP Proceeding Stacking Semiconductor Packages, 2001, pp. 16-21 has been proposed. The following describes this example while referring to
FIGS. 12A and 12B
. Glass-epoxy substrates
1002
, on each of which a flexible semiconductor chip
1001
with a thickness of 50 &mgr;m to 100 &mgr;m is mounted (FIG.
12
A), are stacked so as to form a stacked memory package
1003
(
FIG. 12B
) that achieves the high-density mounting. In
FIG. 12A
,
1004
denotes a projection electrode of the semiconductor chip
1001
,
1005
denotes a surface electrode of a glass-epoxy substrate
1002
,
1006
denotes a sealing resin,
1007
denotes a glass-epoxy substrate,
1008
denotes a via,
1009
denotes a wiring line, and
1010
denotes a recessed space.
However, when the technique of providing the recessed space
1010
in the circuit substrate and arranging the semiconductor chip
1001
therein is used, the process of forming a recess in the substrate is expensive, irrespective of which type is used, a ceramic substrate or a resin-based substrate, and a problem of a decrease in the manufacturing yield arises also. Furthermore, in the technique for arranging a semiconductor chip and applying a sealing resin to a glass-epoxy substrate, the via hole connecting technique by drilling and plating through holes is used. In this case, since the material used for forming a substrate normally is a resin such as glass-epoxy, the thermal conductivity of the substrate itself is low, thereby causing a module obtained to have a limited heat dissipating property, and impairing the reliability.
Furthermore, in a circuit component built-in module having multiple layers of circuit substrates, in a case where a multiplicity of circuit substrates are stacked in a vertical direction, the high-density mounting is limited, since the module as a whole has a relatively great thickness. In the case of a memory module in which memory semiconductor chips of different types are stacked in a vertical direction, such as a static random access memory (SRAM), a flash memory, etc., the thickness of the semiconductor chip is limited so that the module is formed thinner, while the layers in the whole module are limited to three or four in number, resulting in that the high-density mounting cannot be achieved sufficiently.
On the other hand, a technique of abrading a semiconductor chip on a wafer and thereafter dicing and mounting the same on a substrate has been developed actively, but such a thin semiconductor chip is difficult to handle, and the production efficiency thereof, which is determined by the mounting property of the same with respect to a substrate, is low.
Furthermore, in the stacked memory package
1003
in which thin semiconductor chips are stacked as shown in
FIGS. 12A and 12B
, the thickness of the substrate
1002
is predominant, and it is difficult to provide, for instance, a stack of about eight layers within a specific range of a module thickness. Furthermore, in such a stacked module, vias formed by plating are used generally as a means for connecting layers with each other, which requires a complex process for improving the adhesiveness between the layers. Besides, it makes it difficult to incorporate semiconductor chips in the substrates
1002
, and produces gaps around the semiconductor chips, which possibly leads to, for instance, a danger of water vapor explosion in a reflowing process upon moisture absorption, thus impairing the reliability of a module obtained.
In such a thin stacked module, in the case where a glass-epoxy substrate, for instance, is used for increasing the strength of the substrate
1002
, it is difficult to incorporate a semiconductor chip in the substrate
1002
, and for instance, as shown in
FIG. 13
, it is necessary to mount chip components
1104
such as inductors (L), capacitors (C), resistors (R), etc. on the topmost surface of the module. Therefore, this restricts the structure design of the circuit board, such as the optimal arrangement of circuit components with a view to achieving the high-density mounting.
SUMMARY OF THE INVENTION
Therefore, with the foregoing in mind, it is an object of the present invention to provide a thin, high-performance, and compact-size circuit component built-in module in which circuit components are mounted at a high density so as to be used suitably in various types of electronic information devices, and a method for manufacturing the same.
To achieve the aforementioned objects, a circuit component built-in module of the present invention includes: a first electrical insulating substrate made of a mixture containing an inorganic filler and a thermosetting resin; a plurality of wiring patterns formed at least on a principal surface of the first electrical insulating substrate; a semiconductor chip incorporated in the first electrical insulating substrate and connected electrically with the wiring patterns; and inner vias electrically connecting the plurality of wiring patterns with one another, the inner vias passing through the first electrical insulating substrate. In the m
Asahi Toshiyuki
Komatsu Shingo
Nakatani Seiichi
Ohtani Kazuo
Sugaya Yasuhiro
Lewis Monica
Matsushita Electric - Industrial Co., Ltd.
Merchant & Gould P.C.
Wilczewski Mary
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