Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate
2000-09-22
2003-02-11
Cuneo, Kamand (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
C257S706000
Reexamination Certificate
active
06518666
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a circuit board and a method of mounting an integrated circuit chip, as a chip-on-board (COB).
2. Description of the Related Art
An integrated circuit chip (hereinafter called LSI) can be mounted on a wiring board as a flip chip and a connection thereto sealed with resin. Generally, the coefficient of thermal expansion of the wiring board is large, compared with that of the LSI. However, when a soft printed wiring board is used, the portion where the LSI is mounted is easily deformed on the side where LSI is mounted, because a difference in coefficients of thermal expansion between the wiring board and LSI causes a convex warp.
Referring to
FIG. 15
, a COB
100
may include active elements such as LSI
101
and a driver IC
112
, a passive element such as a tantalum capacitor
112
a
, a chip capacitor
112
b
and a connector
112
c
mounted on wiring board
102
. Sealing resin
103
is injected between LSI
101
and the wiring board
102
, and a heat sink
110
for outgoing radiation is attached on LSI
101
via a thermal conduction member. The chip capacitor
112
b
that functions as a bypass capacitor of each LSI
101
is also soldered on the wiring board
102
. Each terminal of the connector
112
c
is connected to LSI
101
and others via wiring provided on the surface or inside the wiring board
102
. Therefore, COB
100
is electrically connected to an external device via the connector
112
c.
Referring to
FIG. 16
, when the heat sink
110
is attached to the back of LSI
101
, the thickness of a thermal conduction member
109
is not uniform. When the distance between the heat sink
110
and LSI
101
increases in the periphery, the heat resistance increases, degrading the outgoing radiation. Also, depending upon a temperature change while LSI
101
is operated, the warp of the LSI may change, causing peeling of the thermal conduction member
109
. When the warp is further increased, the LSI may crack.
To solve the problems described above, a structure in which the warp of LSI seldom changes is required.
Japanese published unexamined patent application No. Hei 10-229102 discloses a technique for preventing an LSI chip from being warped by mounting another LSI chip on the back of a wiring board opposite to the LSI chip mounted on the wiring board is. However, this technique can be applied only when two LSI chips having the same shape are packaged as one pair.
Also, a few hundred to more than a thousand solder bumps are generally provided on one side of an LSI chip. If an LSI chip is mounted on both sides of a wiring board, then an electrode pad is also required to be provided on both sides of the wiring board. Therefore, the structure of the wiring board becomes very complex and the manufacture is difficult. In the future, as large scale integrated circuits are enlarged, the number of the pins will increase. From the viewpoint of manufacturing a wiring board, it is not good policy to adopt the technique disclosed in the above-noted patent application to prevent the LSI from being warped.
SUMMARY OF THE INVENTION
The invention is made to solve the above-described problems and the object is to provide the circuit board and the method of mounting an integrated circuit chip wherein the warp of the LSI can easily be reduced when plural LSIs are mounted on a wiring board.
To achieve such an object, the circuit board according to the invention is based upon the structure of an integrated circuit chip provided with a wiring board and a plurality of integrated circuit chips mounted on the wiring board, at least one of the integrated circuit chips is mounted on a first surface of the wiring board as a flip chip with a sealing resin, and a bare plate is mounted with a resin directly opposite the integrated circuit chip on a second surface of the wiring board opposite the first surface.
The invention inhibits the warp of the LSI as described above. Furthermore, the structure where the effect of outgoing radiation is high can be acquired by providing a uniformly thin thermal conduction member on a face where a heat sink and LSI are bonded. Also, in the structure, arranging the chip capacitor on the wiring board between the plate on the second surface and the wiring board can inhibit the rapid variation in voltage of the LSI, and high-speed operation can be realized.
REFERENCES:
patent: 5275889 (1994-01-01), Yokouchi et al.
patent: 5550407 (1996-08-01), Ogashiwa
patent: 5585672 (1996-12-01), Koike et al.
patent: 5744863 (1998-04-01), Culnane et al.
patent: 5789820 (1998-08-01), Yamashita
patent: 5886408 (1999-03-01), Ohki et al.
patent: 5970319 (1999-10-01), Banks et al.
patent: 5981085 (1999-11-01), Ninomiya et al.
patent: 6069023 (2000-05-01), Bernier et al.
patent: 6108208 (2000-08-01), Tustaniwskyj et al.
patent: 6133071 (2000-10-01), Nagai
patent: 6144101 (2000-11-01), Akram
patent: 6169328 (2001-02-01), Mitchell et al.
patent: 10-229102 (1998-08-01), None
Cruz Lourdes
Cuneo Kamand
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