Circuit arrangement for the analogue suppression of echoes

Details Circuit arrangement for the analogue suppression of echoes Circuit arrangement for the analogue suppression of echoes

2006-12-19

2006-12-19

Chan, Wing (Department: 2614)

Telephonic communications

Echo cancellation or suppression

C379S406150, C379S406160, C370S286000, C455S570000

Reexamination Certificate

active

07151828

ABSTRACT:
A circuit arrangement for the analogue suppression of echoes, as in particular can be used in a hybrid-circuit for DSL-transmission systems, comprises a replica (8) for emulating the behaviour of the transmission line (17). In addition, a circuit (3, 4) for emulating the behaviour of the transmitter (13) is provided, which comprises at least one lowpass (3, 4). Furthermore, a replica (9, 10) for emulating the behaviour of bridge taps (14) can also be provided, which comprises at least one bandpass (9, 10). Additionally, a replica (19) for emulating the behaviour of the line driver (1) can also be provided.

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C. Conroy et al., “A CMOS Analog Front-End IC for DMT ADSL”, 1999 IEE International Solid-State Circuits Conference, ISSCC 99, Session 14, Paper TP 14.2.
R. Hester et al., “CODEC for Echo-Cancelling, Full-Rate ADSL Modems”, IEEE International Solid-State Circuits Conference, ISSCC 99, Session 14, Paper TP 14.4 (1999).
F. Pecourt et al., “An Integrated Adaptive Analog Balancing Hybrid for Use in (A)DSL Modems”, IEE International Solid-State Circuits Conference ISSCC 99, Session 14, Paper TP 14.8 (1999).
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