Circuit arrangement for protected data transmission,...

Details Circuit arrangement for protected data transmission,... Circuit arrangement for protected data transmission,...

2006-11-06

2008-09-30

Baderman, Scott T. (Department: 2114)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S047300

Reexamination Certificate

active

07430690

ABSTRACT:
A circuit arrangement allows data, which are necessary for building up fault-tolerant structures, to be transmitted on standard ring-shaped bus systems. Its implementation requires a monitoring unit and input and output units which transmit or receive data for control. The circuit arrangement handles the task of detecting any faults which can become a danger for the process within a machine or plant. Due to its internal configuration, the circuit arrangement identifies any fault even before the detection of the fault and initiates a protected switch-off. In this arrangement, it is of no importance whether it is the external control unit or the bus system used which is responsible for the fault.

REFERENCES:
patent: 4486826 (1984-12-01), Wolff et al.
patent: 5361334 (1994-11-01), Cawley
patent: 5390188 (1995-02-01), Dawson
patent: 5425017 (1995-06-01), Copley et al.
patent: 5602827 (1997-02-01), Lindeborg et al.
patent: 5745268 (1998-04-01), Eastvold et al.
patent: 6385562 (2002-05-01), Roth et al.

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